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Message-ID: <167947647519.5837.2418911139525900027.tip-bot2@tip-bot2>
Date: Wed, 22 Mar 2023 09:14:35 -0000
From: "tip-bot2 for Kan Liang" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Kan Liang <kan.liang@...ux.intel.com>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: perf/core] perf/x86/msr: Add Granite Rapids
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 5a796d5cb5d11f5aad4893a59f22715810769928
Gitweb: https://git.kernel.org/tip/5a796d5cb5d11f5aad4893a59f22715810769928
Author: Kan Liang <kan.liang@...ux.intel.com>
AuthorDate: Tue, 14 Mar 2023 10:00:40 -07:00
Committer: Peter Zijlstra <peterz@...radead.org>
CommitterDate: Tue, 21 Mar 2023 14:43:08 +01:00
perf/x86/msr: Add Granite Rapids
The same as Sapphire Rapids, the SMI_COUNT MSR is also supported on
Granite Rapids. Add Granite Rapids model.
Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Link: https://lore.kernel.org/r/20230314170041.2967712-2-kan.liang@linux.intel.com
---
arch/x86/events/msr.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index c65d890..0feaaa5 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -70,6 +70,8 @@ static bool test_intel(int idx, void *data)
case INTEL_FAM6_BROADWELL_X:
case INTEL_FAM6_SAPPHIRERAPIDS_X:
case INTEL_FAM6_EMERALDRAPIDS_X:
+ case INTEL_FAM6_GRANITERAPIDS_X:
+ case INTEL_FAM6_GRANITERAPIDS_D:
case INTEL_FAM6_ATOM_SILVERMONT:
case INTEL_FAM6_ATOM_SILVERMONT_D:
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