linux-kernel - Re: [PATCH v1 1/2] dt-bindings: reset: mt8188: Add reset control for DSI0

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Date:   Wed, 22 Mar 2023 10:27:25 +0100
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Shawn Sung <shawn.sung@...iatek.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com,
        Chun-Kuang Hu <chunkuang.hu@...nel.org>,
        Singo Chang <singo.chang@...iatek.com>,
        Nancy Lin <nancy.lin@...iatek.com>,
        Jason-JH Lin <jason-jh.lin@...iatek.com>
Subject: Re: [PATCH v1 1/2] dt-bindings: reset: mt8188: Add reset control for
 DSI0

Il 22/03/23 09:34, Krzysztof Kozlowski ha scritto:
> On 22/03/2023 04:22, Shawn Sung wrote:
>> Add reset control for DSI0.
>>
>> Signed-off-by: Shawn Sung <shawn.sung@...iatek.com>
>> ---
>>   include/dt-bindings/reset/mt8188-resets.h | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/include/dt-bindings/reset/mt8188-resets.h b/include/dt-bindings/reset/mt8188-resets.h
>> index 377cdfda82a9..5c9e74130ef0 100644
>> --- a/include/dt-bindings/reset/mt8188-resets.h
>> +++ b/include/dt-bindings/reset/mt8188-resets.h
>> @@ -33,4 +33,7 @@
>>
>>   #define MT8188_TOPRGU_SW_RST_NUM               24
>>
>> +/* VDOSYS0 */
>> +#define MT8188_VDO0_RST_DSI0                   21
> 
> Why this is not 0? IDs start from 0.
> 

Because mtk-mmsys needs to be fixed, bindings IDs are *again* 1:1 with HW bits,
there's no mapping like the one that was "recently" done in clk/mediatek resets.

Since VDO0/1 have got lots of holes in reset bit mapping, it's definitely time
to fix this situation now.....

Shawn, please fix.
For your reference, look at [1] and [2].

[1]: https://lore.kernel.org/all/20220523060056.24396-9-rex-bc.chen@mediatek.com/
[2]: https://lore.kernel.org/all/20220523060056.24396-15-rex-bc.chen@mediatek.com/

Regards,
Angelo


>