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Message-ID: <20230322094820.24738-5-walker.chen@starfivetech.com>
Date: Wed, 22 Mar 2023 17:48:20 +0800
From: Walker Chen <walker.chen@...rfivetech.com>
To: Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>,
Vinod Koul <vkoul@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor.dooley@...rochip.com>,
Palmer Dabbelt <palmer@...belt.com>,
"Emil Renner Berthing" <emil.renner.berthing@...onical.com>,
Walker Chen <walker.chen@...rfivetech.com>
CC: <dmaengine@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-riscv@...ts.infradead.org>
Subject: [PATCH v6 4/4] riscv: dts: starfive: add dma controller node
Add the dma controller node for the Starfive JH7110 SoC.
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@...onical.com>
Signed-off-by: Walker Chen <walker.chen@...rfivetech.com>
---
arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 17220576b21c..b503b6137743 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -510,6 +510,24 @@
#gpio-cells = <2>;
};
+ dma: dma-controller@...50000 {
+ compatible = "starfive,jh7110-axi-dma";
+ reg = <0x0 0x16050000 0x0 0x10000>;
+ clocks = <&stgcrg JH7110_STGCLK_DMA1P_AXI>,
+ <&stgcrg JH7110_STGCLK_DMA1P_AHB>;
+ clock-names = "core-clk", "cfgr-clk";
+ resets = <&stgcrg JH7110_STGRST_DMA1P_AXI>,
+ <&stgcrg JH7110_STGRST_DMA1P_AHB>;
+ interrupts = <73>;
+ #dma-cells = <1>;
+ dma-channels = <4>;
+ snps,dma-masters = <1>;
+ snps,data-width = <3>;
+ snps,block-size = <65536 65536 65536 65536>;
+ snps,priority = <0 1 2 3>;
+ snps,axi-max-burst-len = <16>;
+ };
+
aoncrg: clock-controller@...00000 {
compatible = "starfive,jh7110-aoncrg";
reg = <0x0 0x17000000 0x0 0x10000>;
--
2.17.1
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