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Message-ID: <b9235dfc-10dc-1ed0-1510-fd98902491e3@nvidia.com>
Date: Wed, 22 Mar 2023 13:42:21 +0000
From: Jon Hunter <jonathanh@...dia.com>
To: Akhil R <akhilrajeev@...dia.com>,
"christian.koenig@....com" <christian.koenig@....com>,
"digetx@...il.com" <digetx@...il.com>,
Laxman Dewangan <ldewangan@...dia.com>,
"linux-i2c@...r.kernel.org" <linux-i2c@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
"sumit.semwal@...aro.org" <sumit.semwal@...aro.org>,
"thierry.reding@...il.com" <thierry.reding@...il.com>,
"wsa@...nel.org" <wsa@...nel.org>
Subject: Re: [PATCH v3] i2c: tegra: Share same DMA channel for RX and TX
On 22/03/2023 12:00, Akhil R wrote:
>> On 22/03/2023 10:24, Akhil R wrote:
>>> Allocate only one DMA channel for I2C and share it for both TX and RX
>>> instead of using two different DMA hardware channels with the same
>>> slave ID. Since I2C supports only half duplex, there is no impact on
>>> perf with this.
>>>
>>> Signed-off-by: Akhil R <akhilrajeev@...dia.com>
>>
>> Just to confirm. This impacts all Tegra devices from Tegra20 to the
>> latest. Does this work for all Tegra and the different DMA controllers
>> that they have?
>>
> Yes, It should. I could see in the APB DMA driver that the same channel
> could be used for TX and RX and the direction is configured only during
> dma_prep_*() calls.
> I did not test it on a Tegra with APB DMA, but since it works very similar
> to GPC DMA there should not be any impact.
OK. BTW, this does not apply cleanly on top of -next. It appears that
this is based on top "i2c: tegra: Fix PEC support for SMBUS block read"
and that one needs to be applied first. This can be avoided if you send
as a series.
Jon
--
nvpublic
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