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Message-ID: <CAP-5=fW_8FEsrvYxR8wXcGJR3WFfepmfrZFcaPsHwE+ugTB9Pg@mail.gmail.com>
Date: Thu, 23 Mar 2023 09:59:57 -0700
From: Ian Rogers <irogers@...gle.com>
To: Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Zhengjun Xing <zhengjun.xing@...ux.intel.com>,
Kan Liang <kan.liang@...ux.intel.com>,
linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
Edward Baker <edward.baker@...el.com>
Subject: Re: [PATCH] perf vendor events: Sandybridge and version number minor updates
On Wed, Mar 22, 2023 at 3:38 PM Ian Rogers <irogers@...gle.com> wrote:
>
> Add BR_MISP_EXEC.INDIRECT to Sandybridge. Update version numbers based on:
> https://github.com/intel/perfmon/pull/62
> which didn't modify the generated perf json.
>
> Signed-off-by: Ian Rogers <irogers@...gle.com>
I've spotted a mistake with this and will resend.
Thanks,
Ian
> ---
> tools/perf/pmu-events/arch/x86/mapfile.csv | 14 +++++++-------
> .../pmu-events/arch/x86/sandybridge/pipeline.json | 8 ++++++++
> 2 files changed, 15 insertions(+), 7 deletions(-)
>
> diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-events/arch/x86/mapfile.csv
> index 9abebe50ae0d..41d755d570e6 100644
> --- a/tools/perf/pmu-events/arch/x86/mapfile.csv
> +++ b/tools/perf/pmu-events/arch/x86/mapfile.csv
> @@ -2,26 +2,26 @@ Family-model,Version,Filename,EventType
> GenuineIntel-6-(97|9A|B7|BA|BF),v1.19,alderlake,core
> GenuineIntel-6-BE,v1.19,alderlaken,core
> GenuineIntel-6-(1C|26|27|35|36),v4,bonnell,core
> -GenuineIntel-6-(3D|47),v26,broadwell,core
> -GenuineIntel-6-56,v7,broadwellde,core
> -GenuineIntel-6-4F,v19,broadwellx,core
> +GenuineIntel-6-(3D|47),v27,broadwell,core
> +GenuineIntel-6-56,v9,broadwellde,core
> +GenuineIntel-6-4F,v20,broadwellx,core
> GenuineIntel-6-55-[56789ABCDEF],v1.17,cascadelakex,core
> GenuineIntel-6-9[6C],v1.03,elkhartlake,core
> GenuineIntel-6-5[CF],v13,goldmont,core
> GenuineIntel-6-7A,v1.01,goldmontplus,core
> GenuineIntel-6-A[DE],v1.01,graniterapids,core
> -GenuineIntel-6-(3C|45|46),v32,haswell,core
> -GenuineIntel-6-3F,v26,haswellx,core
> +GenuineIntel-6-(3C|45|46),v33,haswell,core
> +GenuineIntel-6-3F,v27,haswellx,core
> GenuineIntel-6-(7D|7E|A7),v1.17,icelake,core
> GenuineIntel-6-6[AC],v1.19,icelakex,core
> GenuineIntel-6-3A,v23,ivybridge,core
> GenuineIntel-6-3E,v22,ivytown,core
> -GenuineIntel-6-2D,v22,jaketown,core
> +GenuineIntel-6-2D,v23,jaketown,core
> GenuineIntel-6-(57|85),v10,knightslanding,core
> GenuineIntel-6-A[AC],v1.01,meteorlake,core
> GenuineIntel-6-1[AEF],v3,nehalemep,core
> GenuineIntel-6-2E,v3,nehalemex,core
> -GenuineIntel-6-2A,v18,sandybridge,core
> +GenuineIntel-6-2A,v19,sandybridge,core
> GenuineIntel-6-(8F|CF),v1.11,sapphirerapids,core
> GenuineIntel-6-(37|4A|4C|4D|5A),v15,silvermont,core
> GenuineIntel-6-(4E|5E|8E|9E|A5|A6),v55,skylake,core
> diff --git a/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json b/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json
> index 54454e5e262c..ecaf94ccc9c7 100644
> --- a/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json
> +++ b/tools/perf/pmu-events/arch/x86/sandybridge/pipeline.json
> @@ -210,6 +210,14 @@
> "SampleAfterValue": "200003",
> "UMask": "0xc4"
> },
> + {
> + "BriefDescription": "Speculative mispredicted indirect branches",
> + "EventCode": "0x89",
> + "EventName": "BR_MISP_EXEC.INDIRECT",
> + "PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Counts for indirect near CALL or JMP instructions (RET excluded).",
> + "SampleAfterValue": "200003",
> + "UMask": "0xe4"
> + },
> {
> "BriefDescription": "Not taken speculative and retired mispredicted macro conditional branches.",
> "EventCode": "0x89",
> --
> 2.40.0.rc1.284.g88254d51c5-goog
>
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