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Date:   Thu, 23 Mar 2023 14:49:00 +0300
From:   Serge Semin <fancer.lancer@...il.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Serge Semin <Sergey.Semin@...kalelectronics.ru>,
        Giuseppe Cavallaro <peppe.cavallaro@...com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        Jose Abreu <joabreu@...opsys.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
        Christian Marangi <ansuelsmth@...il.com>,
        Richard Cochran <richardcochran@...il.com>,
        Biao Huang <biao.huang@...iatek.com>,
        Yang Yingliang <yangyingliang@...wei.com>,
        devicetree@...r.kernel.org, netdev@...r.kernel.org,
        linux-stm32@...md-mailman.stormreply.com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next 10/16] dt-bindings: net: dwmac: Add AXI-bus
 properties constraints

On Thu, Mar 16, 2023 at 09:06:32AM +0100, Krzysztof Kozlowski wrote:
> On 13/03/2023 23:50, Serge Semin wrote:
> > Currently none of the AXI-bus non-boolean DT-properties have constraints
> > defined meanwhile they can be specified at least based on the
> > corresponding device configs. Let's do that:
> > + snps,wr_osr_lm/snps,rd_osr_lmt - maximum number of outstanding AXI-bus
> > read/write requests is limited with the IP-core synthesize parameter
> > AXI_MAX_{RD,WR}_REQ. DW MAC/GMAC: <= 16, DW Eth QoS: <= 32, DW xGMAC: <=
> > 64. The least restrictive constraint is defined since the DT-schema is
> > common for all IP-cores.
> > + snps,blen - array of the burst lengths supported by the AXI-bus. Values
> > are limited by the AXI3/4 bus standard, available AXI/System bus CSR flags
> > and the AXI-bus IP-core synthesize config . All DW *MACs support setting
> > the burst length within the set: 4, 8, 16, 32, 64, 128, 256. If some burst
> > length is unsupported a zero value can be specified instead in the array.
> > 
> > Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> 
> 
> >  
> >        snps,kbbe:
> >          $ref: /schemas/types.yaml#/definitions/uint32
> > @@ -501,6 +507,8 @@ properties:
> >            this is a vector of supported burst length.
> >          minItems: 7
> >          maxItems: 7
> > +        items:
> > +          enum: [256, 128, 64, 32, 16, 8, 4, 0]
> 

> Increasing order.

Ok.

-Serge(y)

> 
> Best regards,
> Krzysztof
> 

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