lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20230323122910.991148-1-d-gole@ti.com>
Date:   Thu, 23 Mar 2023 17:59:09 +0530
From:   Dhruva Gole <d-gole@...com>
To:     Keerthy <j-keerthy@...com>
CC:     Vibhore Vardhan <vibhore@...com>, Dhruva Gole <d-gole@...com>,
        Tony Lindgren <tony@...mide.com>, Vignesh <vigneshr@...com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        <linux-gpio@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Devarsh Thakkar <devarsht@...com>
Subject: [RFC PATCH 1/2] gpio: davinci: Do not clear the bank intr enable bit in save_context

The interrupt enable bits might be set if we want to use the GPIO as
wakeup source. Clearing this will mean disabling of interrupts in the GPIO
banks that we may want to wakeup from.
Thus remove the line that was clearing this bit from the driver's save
context function.

Fixes: 0651a730924b ("gpio: davinci: Add support for system suspend/resume PM")
Cc: Devarsh Thakkar <devarsht@...com>
Signed-off-by: Dhruva Gole <d-gole@...com>
---
 drivers/gpio/gpio-davinci.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index 7fc83057990a..d7595b39e8c4 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -639,9 +639,6 @@ static void davinci_gpio_save_context(struct davinci_gpio_controller *chips,
 		context->set_falling = readl_relaxed(&g->set_falling);
 	}
 
-	/* Clear Bank interrupt enable bit */
-	writel_relaxed(0, base + BINTEN);
-
 	/* Clear all interrupt status registers */
 	writel_relaxed(GENMASK(31, 0), &g->intstat);
 }
-- 
2.25.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ