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Date:   Sat, 25 Mar 2023 19:26:12 +0000
From:   Jonathan Cameron <jic23@...nel.org>
To:     Naresh Solanki <naresh.solanki@...ements.com>
Cc:     Lars-Peter Clausen <lars@...afoo.de>, Lee Jones <lee@...nel.org>,
        Patrick Rudolph <patrick.rudolph@...ements.com>,
        linux-kernel@...r.kernel.org, linux-iio@...r.kernel.org
Subject: Re: [PATCH 1/2] iio: max597x: Add support for max597x

On Thu, 23 Mar 2023 17:31:18 +0530
Naresh Solanki <naresh.solanki@...ements.com> wrote:

> Hi,
> 
> On 22-03-2023 09:28 pm, Lars-Peter Clausen wrote:
> > Hi,
> > 
> > This looks really good. A few minor comments inline.
> > 
> > On 3/22/23 05:43, Naresh Solanki wrote:  
> >> [...]
> >> +static int max597x_iio_read_raw(struct iio_dev *iio_dev,
> >> +                struct iio_chan_spec const *chan,
> >> +                int *val, int *val2, long info)
> >> +{
> >> +    int ret;
> >> +    struct max597x_iio *data = iio_priv(iio_dev);
> >> +    unsigned int reg_l, reg_h;
> >> +
> >> +    switch (info) {
> >> +    case IIO_CHAN_INFO_RAW:
> >> +        ret = regmap_read(data->regmap, chan->address, &reg_l);
> >> +        if (ret < 0)
> >> +            return ret;
> >> +        ret = regmap_read(data->regmap, chan->address - 1, &reg_h);
> >> +        if (ret < 0)
> >> +            return ret;  
> > Is there any chance of a race condition of getting inconsistent data 
> > when splitting this over two reads? I.e. registers being updated with 
> > new values in between the two reads.  
> yes, reg_l holds lower 2 bits. due to latency in reads, value may differ.

Normally there is a way to avoid the tearing via a bulk read of some type.
Is that not possible here?  If not, there are various tricks such as
repeated reads until stable that can be used.


Looks like the device has a block read format that might work.

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