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Message-ID: <20230327043405.881645-2-joychakr@google.com> Date: Mon, 27 Mar 2023 04:34:04 +0000 From: Joy Chakraborty <joychakr@...gle.com> To: Serge Semin <fancer.lancer@...il.com>, Mark Brown <broonie@...nel.org> Cc: linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org, manugautam@...gle.com, rohitner@...gle.com, Joy Chakraborty <joychakr@...gle.com> Subject: [PATCH v4 1/2] spi: dw: Add 32 bpw support to DW DMA Controller Add Support for AxSize = 4 bytes configuration from dw dma driver if n_bytes i.e. number of bytes per write to fifo is 3 or 4. Number of bytes written to fifo per write is depended on the bits/word configuration being used which the DW core driver translates to n_bytes. Signed-off-by: Joy Chakraborty <joychakr@...gle.com> --- drivers/spi/spi-dw-dma.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c index ababb910b391..b3a88bb75907 100644 --- a/drivers/spi/spi-dw-dma.c +++ b/drivers/spi/spi-dw-dma.c @@ -208,12 +208,17 @@ static bool dw_spi_can_dma(struct spi_controller *master, static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes) { - if (n_bytes == 1) + switch (n_bytes) { + case 1: return DMA_SLAVE_BUSWIDTH_1_BYTE; - else if (n_bytes == 2) + case 2: return DMA_SLAVE_BUSWIDTH_2_BYTES; - - return DMA_SLAVE_BUSWIDTH_UNDEFINED; + case 3: + case 4: + return DMA_SLAVE_BUSWIDTH_4_BYTES; + default: + return DMA_SLAVE_BUSWIDTH_UNDEFINED; + } } static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed) -- 2.40.0.348.gf938b09366-goog
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