linux-kernel - Re: [PATCH] arm64: dts: imx8mp-evk: add dual-role usb port1 support

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Message-ID: <20230327082210.2s2kelyxxua375dk@pengutronix.de>
Date:   Mon, 27 Mar 2023 10:22:10 +0200
From:   Marco Felsch <m.felsch@...gutronix.de>
To:     Jun Li <jun.li@....com>
Cc:     "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        dl-linux-imx <linux-imx@....com>,
        "festevam@...il.com" <festevam@...il.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        Xu Yang <xu.yang_2@....com>
Subject: Re: [PATCH] arm64: dts: imx8mp-evk: add dual-role usb port1 support

Hi,

On 23-03-24, Jun Li wrote:
> 
> 
> > -----Original Message-----
> > From: Marco Felsch <m.felsch@...gutronix.de>
> > Sent: Thursday, March 23, 2023 6:58 PM
> > To: robh+dt@...nel.org; krzysztof.kozlowski+dt@...aro.org;
> > shawnguo@...nel.org; dl-linux-imx <linux-imx@....com>; festevam@...il.com
> > Cc: linux-arm-kernel@...ts.infradead.org; linux-kernel@...r.kernel.org;
> > kernel@...gutronix.de
> > Subject: [PATCH] arm64: dts: imx8mp-evk: add dual-role usb port1 support
> > 
> > The i.MX8MP-EVK has a dual-role usb-type-c port marked as PORT1. By this
> > commit the dual-role support is added which allows the user-space to assign
> > usb-gadget functions to it via the configFS.
> 
> So just ignore the orientation switch will make this port cannot work
> at super speed, this is actually why this port is not enabled at upstream.

I saw comments on the i.MX8MP-EVK schematic but no erratum listed. Can
you explain this a bit more in detail? Since the USBx_ID pin is
unconnected, the role is described via DTs as otg and the tcpc can be
configured via user-space. I tested this at least for the device mode.

> I see the orientation switch via GPIO for SBU is already merged:
> drivers/usb/typec/mux/gpio-sbu-mux.c
> Do you have interest to expand this driver to support super speed
> switch for this case? 

My intention was to enable this port to be able to have it as device
which is useful for bootloaders. The speed doesn't matter to me, at
least not now.

Regards,
  Marco


> 
> Thanks
> Li Jun
> > 
> > Signed-off-by: Marco Felsch <m.felsch@...gutronix.de>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 59 ++++++++++++++++++++
> >  1 file changed, 59 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > index f2d93437084be..982fe35f09a7e 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > @@ -5,7 +5,9 @@
> > 
> >  /dts-v1/;
> > 
> > +#include <dt-bindings/interrupt-controller/irq.h>
> >  #include <dt-bindings/phy/phy-imx8-pcie.h>
> > +#include <dt-bindings/usb/pd.h>
> >  #include "imx8mp.dtsi"
> > 
> >  / {
> > @@ -336,6 +338,34 @@ &i2c2 {
> >  	pinctrl-names = "default";
> >  	pinctrl-0 = <&pinctrl_i2c2>;
> >  	status = "okay";
> > +
> > +	tcpc@50 {
> > +		compatible = "nxp,ptn5110";
> > +		reg = <0x50>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_tcpc>;
> > +		interrupt-parent = <&gpio4>;
> > +		interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
> > +
> > +		connector {
> > +			compatible = "usb-c-connector";
> > +			label = "USB-C";
> > +			power-role = "dual";
> > +			data-role = "dual";
> > +			try-power-role = "sink";
> > +			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> > +			sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
> > +				     PDO_VAR(5000, 20000, 3000)>;
> > +			op-sink-microwatt = <15000000>;
> > +			self-powered;
> > +		};
> > +
> > +		port {
> > +			usb_con_ss: endpoint {
> > +				remote-endpoint = <&usb_dwc3_0_drd>;
> > +			};
> > +		};
> > +	};
> >  };
> > 
> >  &i2c3 {
> > @@ -449,14 +479,37 @@ &uart2 {
> >  	status = "okay";
> >  };
> > 
> > +&usb3_phy0 {
> > +	status = "okay";
> > +};
> > +
> >  &usb3_phy1 {
> >  	status = "okay";
> >  };
> > 
> > +&usb3_0 {
> > +	status = "okay";
> > +};
> > +
> >  &usb3_1 {
> >  	status = "okay";
> >  };
> > 
> > +&usb_dwc3_0 {
> > +	dr_mode = "otg";
> > +	hnp-disable;
> > +	srp-disable;
> > +	adp-disable;
> > +	usb-role-switch;
> > +	status = "okay";
> > +
> > +	port {
> > +		usb_dwc3_0_drd: endpoint {
> > +			remote-endpoint = <&usb_con_ss>;
> > +		};
> > +	};
> > +};
> > +
> >  &usb_dwc3_1 {
> >  	pinctrl-names = "default";
> >  	pinctrl-0 = <&pinctrl_usb1_vbus>;
> > @@ -666,6 +719,12 @@ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x40
> >  		>;
> >  	};
> > 
> > +	pinctrl_tcpc: tcpcgrp {
> > +		fsl,pins = <
> > +			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19	0x159
> > +		>;
> > +	};
> > +
> >  	pinctrl_uart1: uart1grp {
> >  		fsl,pins = <
> >  			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x140
> > --
> > 2.30.2
> 
>