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Message-ID: <20230328144742.vty3cpmgmsdyjiia@kandell>
Date: Tue, 28 Mar 2023 16:47:42 +0200
From: Marek Behún <marek.behun@....cz>
To: Andrew Lunn <andrew@...n.ch>
Cc: Gustav Ekelund <gustaek@...s.com>,
Gustav Ekelund <gustav.ekelund@...s.com>,
Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>, kernel@...s.com,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net] net: dsa: mv88e6xxx: Reset mv88e6393x watchdog
register
On Tue, Mar 28, 2023 at 03:45:51PM +0200, Andrew Lunn wrote:
> On Tue, Mar 28, 2023 at 03:34:03PM +0200, Gustav Ekelund wrote:
>
> > 1) Marvell has confirmed that 6393x (Amethyst) differs from 6390 (Peridot)
> > with quote: “I tried this on my board and see G2 offset 0x1B index 12 bit 0
> > does not clear, I also tried doing a SWReset and the bit is still 1. I did
> > try the same on a Peridot board and it clears as advertised.”
> >
> > 2) Marvell are not aware of any other stuck bits, but has confirmed that the
> > WD event bits are not cleared on SW reset which is indeed contradictory to
> > what the data sheet suggests.
>
> Hi Gustav
>
> Please expand the commit message with a summary of this
> information. It answers the questions both Marek and i have been
> asking, so deserves to be in the commit message.
>
> Andrew
Maybe also add a comment next to the code writing to the register, that
this is due to an yet unreleased erratum on 6393x.
Marek
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