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Message-ID: <20230328234315.GD8958@ranerica-svr.sc.intel.com>
Date: Tue, 28 Mar 2023 16:43:15 -0700
From: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
To: "Rafael J. Wysocki" <rafael@...nel.org>
Cc: "Peter Zijlstra (Intel)" <peterz@...radead.org>,
Juri Lelli <juri.lelli@...hat.com>,
Vincent Guittot <vincent.guittot@...aro.org>,
Ricardo Neri <ricardo.neri@...el.com>,
"Ravi V. Shankar" <ravi.v.shankar@...el.com>,
Ben Segall <bsegall@...gle.com>,
Daniel Bristot de Oliveira <bristot@...hat.com>,
Dietmar Eggemann <dietmar.eggemann@....com>,
Len Brown <len.brown@...el.com>, Mel Gorman <mgorman@...e.de>,
"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
Steven Rostedt <rostedt@...dmis.org>,
Tim Chen <tim.c.chen@...ux.intel.com>,
Valentin Schneider <vschneid@...hat.com>,
Lukasz Luba <lukasz.luba@....com>,
Ionela Voinescu <ionela.voinescu@....com>, x86@...nel.org,
"Joel Fernandes (Google)" <joel@...lfernandes.org>,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
"Tim C . Chen" <tim.c.chen@...el.com>
Subject: Re: [PATCH v3 13/24] thermal: intel: hfi: Store per-CPU IPCC scores
On Mon, Mar 27, 2023 at 06:37:32PM +0200, Rafael J. Wysocki wrote:
> On Tue, Feb 7, 2023 at 6:02 AM Ricardo Neri
> <ricardo.neri-calderon@...ux.intel.com> wrote:
> >
> > The scheduler reads the IPCC scores when balancing load. These reads can
> > be quite frequent. Hardware can also update the HFI table frequently.
> > Concurrent access may cause a lot of lock contention. It gets worse as the
> > number of CPUs increases.
> >
> > Instead, create separate per-CPU IPCC scores that the scheduler can read
> > without the HFI table lock.
> >
> > Cc: Ben Segall <bsegall@...gle.com>
> > Cc: Daniel Bristot de Oliveira <bristot@...hat.com>
> > Cc: Dietmar Eggemann <dietmar.eggemann@....com>
> > Cc: Ionela Voinescu <ionela.voinescu@....com>
> > Cc: Joel Fernandes (Google) <joel@...lfernandes.org>
> > Cc: Len Brown <len.brown@...el.com>
> > Cc: Lukasz Luba <lukasz.luba@....com>
> > Cc: Mel Gorman <mgorman@...e.de>
> > Cc: Rafael J. Wysocki <rafael.j.wysocki@...el.com>
> > Cc: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
> > Cc: Steven Rostedt <rostedt@...dmis.org>
> > Cc: Tim C. Chen <tim.c.chen@...el.com>
> > Cc: Valentin Schneider <vschneid@...hat.com>
> > Cc: x86@...nel.org
> > Cc: linux-pm@...r.kernel.org
> > Cc: linux-kernel@...r.kernel.org
> > Suggested-by: Peter Zijlstra (Intel) <peterz@...radead.org>
> > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
> > ---
> > Changes since v2:
> > * Only create these per-CPU variables when Intel Thread Director is
> > supported.
> >
> > Changes since v1:
> > * Added this patch.
> > ---
> > drivers/thermal/intel/intel_hfi.c | 46 +++++++++++++++++++++++++++++++
> > 1 file changed, 46 insertions(+)
> >
> > diff --git a/drivers/thermal/intel/intel_hfi.c b/drivers/thermal/intel/intel_hfi.c
> > index 2527ae3836c7..b06021828892 100644
> > --- a/drivers/thermal/intel/intel_hfi.c
> > +++ b/drivers/thermal/intel/intel_hfi.c
> > @@ -29,6 +29,7 @@
> > #include <linux/kernel.h>
> > #include <linux/math.h>
> > #include <linux/mutex.h>
> > +#include <linux/percpu.h>
> > #include <linux/percpu-defs.h>
> > #include <linux/printk.h>
> > #include <linux/processor.h>
> > @@ -170,6 +171,43 @@ static struct workqueue_struct *hfi_updates_wq;
> > #define HFI_UPDATE_INTERVAL HZ
> > #define HFI_MAX_THERM_NOTIFY_COUNT 16
> >
> > +#ifdef CONFIG_IPC_CLASSES
>
> It would be good to provide a (concise) description of this variable.
>
> > +static int __percpu *hfi_ipcc_scores;
Do you mean hfi_ipcc_scores or CONFIG_IPC_CLASSES?
> > +
> > +static int alloc_hfi_ipcc_scores(void)
> > +{
> > + if (!cpu_feature_enabled(X86_FEATURE_ITD))
> > + return 0;
> > +
> > + hfi_ipcc_scores = __alloc_percpu(sizeof(*hfi_ipcc_scores) *
> > + hfi_features.nr_classes,
> > + sizeof(*hfi_ipcc_scores));
> > +
> > + return !hfi_ipcc_scores;
>
> I would do
>
> if (!hfi_ipcc_scores)
> return -ENOMEM;
>
> return 0;
>
> Or make the function return bool.
Sure, I can make this function return -ENOMEM.
>
> > +}
> > +
> > +static void set_hfi_ipcc_score(void *caps, int cpu)
> > +{
> > + int i, *hfi_class;
> > +
> > + if (!cpu_feature_enabled(X86_FEATURE_ITD))
> > + return;
> > +
> > + hfi_class = per_cpu_ptr(hfi_ipcc_scores, cpu);
> > +
> > + for (i = 0; i < hfi_features.nr_classes; i++) {
> > + struct hfi_cpu_data *class_caps;
> > +
> > + class_caps = caps + i * hfi_features.class_stride;
> > + WRITE_ONCE(hfi_class[i], class_caps->perf_cap);
>
> As it stands, it is unclear why WRITE_ONCE() is needed here.
The CPU handling the HFI interrupt will update all the per-CPU IPCC
scores. My intention is to ensure that a WRITE of a given IPCC score
is completed before another CPU READs an IPCC score. The corresponding
READ_ONCE happens in patch 15.
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