lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <b66e0433-040d-34b8-05f1-a6741861c684@acm.org>
Date:   Tue, 28 Mar 2023 20:07:27 -0700
From:   Bart Van Assche <bvanassche@....org>
To:     Po-Wen Kao <powen.kao@...iatek.com>, linux-scsi@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        Alim Akhtar <alim.akhtar@...sung.com>,
        Avri Altman <avri.altman@....com>,
        "James E.J. Bottomley" <jejb@...ux.ibm.com>,
        "Martin K. Petersen" <martin.petersen@...cle.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
Cc:     wsd_upstream@...iatek.com, peter.wang@...iatek.com,
        stanley.chu@...iatek.com, alice.chao@...iatek.com,
        naomi.chu@...iatek.com, chun-hung.wu@...iatek.com,
        cc.chou@...iatek.com, eddie.huang@...iatek.com,
        mason.zhang@...iatek.com, chaotian.jing@...iatek.com,
        jiajie.hao@...iatek.com
Subject: Re: [PATCH 1/2] scsi: ufs: core: Add host quirk
 UFSHCD_QUIRK_MCQ_BROKEN_INTR

On 3/28/23 03:37, Po-Wen Kao wrote:
> diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
> index acae4e194ec4..1e1271aca1f2 100644
> --- a/drivers/ufs/core/ufshcd.c
> +++ b/drivers/ufs/core/ufshcd.c
> @@ -8493,11 +8493,15 @@ static int ufshcd_alloc_mcq(struct ufs_hba *hba)
>   static void ufshcd_config_mcq(struct ufs_hba *hba)
>   {
>   	int ret;
> -
> +	u32 intrs;
>   	ret = ufshcd_mcq_vops_config_esi(hba);
> +
>   	dev_info(hba->dev, "ESI %sconfigured\n", ret ? "is not " : "");

The use of blank lines in the above code is weird. Please make sure 
there is no blank line inside the declaration block and also that there 
is a blank line between declarations and statements as required by the 
kernel coding style.

> -	ufshcd_enable_intr(hba, UFSHCD_ENABLE_MCQ_INTRS);
> +	intrs = (hba->quirks & UFSHCD_QUIRK_MCQ_BROKEN_INTR) ?
> +		(UFSHCD_ENABLE_MCQ_INTRS & ~MCQ_CQ_EVENT_STATUS) : UFSHCD_ENABLE_MCQ_INTRS;

All parentheses in the above expression are superfluous. Please leave 
these out. Or even better, rewrite the above code as follows:

	intrs = UFSHCD_ENABLE_MCQ_INTRS;
	if (hba->quirks & UFSHCD_QUIRK_MCQ_BROKEN_INTR)
		intrs &= ~MCQ_CQ_EVENT_STATUS;

> +
> +	/*
> +	 * Some platform raises interrupt (per queue) in addition to
> +	 * CQES (traditional) when ESI is disabled.
> +	 * Enable this quirk will disable CQES and use per queue interrupt.
> +	 */
> +	UFSHCD_QUIRK_MCQ_BROKEN_INTR			= 1 << 20,

Isn't this an UFS controller behavior instead of a platform behavior? 
Please consider changing "platform raises" into "controllers raise".

Thanks,

Bart.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ