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Message-ID: <20230329084744.5705-1-quic_jinlmao@quicinc.com>
Date: Wed, 29 Mar 2023 01:47:36 -0700
From: Mao Jinlong <quic_jinlmao@...cinc.com>
To: Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>,
Leo Yan <leo.yan@...aro.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
CC: Mao Jinlong <quic_jinlmao@...cinc.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <coresight@...ts.linaro.org>,
<devicetree@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
Tingwei Zhang <quic_tingweiz@...cinc.com>,
Yuanfang Zhang <quic_yuanfang@...cinc.com>,
Tao Zhang <quic_taozha@...cinc.com>,
Hao Zhang <quic_hazha@...cinc.com>
Subject: [PATCH v1 0/8] Add cmb dataset support for TPDM
Continuous multi-bit (CMB) is responsible for collection of CMB data sets.
It monitors a bus of related signals (eg, a counter value) and an associated valid signal.
This patch series adds support to config of CMB registers.
Element Creation:
CMB_CR.mode : Continuous mode or Trace on Change mode(cmb_mode)
Pattern Match Output (usually to CTI):
CMB_XPR : Trigger pattern register value(cmb_trig_patt_val)
CMB_XPMR : Trigger pattern mask register value(cmb_trig_patt_mask)
Timestamp Request Based on Input Pattern Match:
CMB_TPR : Timestamp pattern register value(cmb_patt_val)
CMB_TPMR : Timestamp pattern mask register value(cmb_patt_mask)
CMB_TIER.patt_tsenab : Timestamps are requested upon CMB interface pattern match via
setting this bit to 1(cmb_patt_ts)
Timestamp Request Based on Input (usually from CTI):
CMB_TIER.xtrig_tsenab : Timestamps are requested upon CMB cross trigger interface
timestamp request via setting this bit to 1(cmb_trig_ts)
Mux Select Registers:
CMB_MSR : Configure Mux select registers(cmb_msr)
Once this series patches are applied properly, the new tpdm nodes should be observed at the tpdm path.
e.g.
/sys/devices/platform/soc@...0c29000.tpdm/tpdm1 # ls -l | grep cmb
-rw-r--r-- 1 root 0 4096 Jan 1 00:00 cmb_mode
-rw-r--r-- 1 root 0 4096 Jan 1 00:00 cmb_msr
-rw-r--r-- 1 root 0 4096 Jan 1 00:00 cmb_patt_mask
-rw-r--r-- 1 root 0 4096 Jan 1 00:00 cmb_patt_ts
-rw-r--r-- 1 root 0 4096 Jan 1 00:22 cmb_patt_val
-rw-r--r-- 1 root 0 4096 Jan 1 00:59 cmb_trig_patt_mask
-rw-r--r-- 1 root 0 4096 Jan 1 00:57 cmb_trig_patt_val
-rw-r--r-- 1 root 0 4096 Jan 1 00:00 cmb_trig_ts
-rw-r--r-- 1 root 0 4096 Jan 1 00:58 cmb_ts_all
This patch series depends on:
[v3,0/11] Add support to configure TPDM DSB subunit
https://patchwork.kernel.org/project/linux-arm-kernel/cover/1679551448-19160-1-git-send-email-quic_taozha@quicinc.com/
Codelinaro link:
https://git.codelinaro.org/clo/linux-kernel/coresight/-/commits/tpdm-cmb-v1
Mao Jinlong (8):
coresight-tpdm: Add CMB dataset support
coresight-tpdm: Add support to configure CMB collection mode
coresight-tpdm: Add pattern registers support for CMB data set
coresight-tpdm: Add timestamp control register support for the CMB
coresight-tpdm: Add msr register support for CMB
dt-bindings: arm: Add support for TPDM CMB MSR register
coresight-tpda: Add support to configure CMB element size
dt-bindings: arm: Add support for TPDM CMB element size
.../testing/sysfs-bus-coresight-devices-tpdm | 63 +++
.../bindings/arm/qcom,coresight-tpdm.yaml | 26 +
drivers/hwtracing/coresight/coresight-tpda.c | 33 +-
drivers/hwtracing/coresight/coresight-tpda.h | 4 +
drivers/hwtracing/coresight/coresight-tpdm.c | 447 +++++++++++++++++-
drivers/hwtracing/coresight/coresight-tpdm.h | 60 +++
6 files changed, 626 insertions(+), 7 deletions(-)
--
2.39.0
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