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Message-ID: <CAJZ5v0iHJrXDU=C0oaf-3DJfatWGj4No_J1rwN6PCpRTZMXqyA@mail.gmail.com>
Date: Wed, 29 Mar 2023 14:21:57 +0200
From: "Rafael J. Wysocki" <rafael@...nel.org>
To: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
Cc: "Rafael J. Wysocki" <rafael@...nel.org>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>,
Juri Lelli <juri.lelli@...hat.com>,
Vincent Guittot <vincent.guittot@...aro.org>,
Ricardo Neri <ricardo.neri@...el.com>,
"Ravi V. Shankar" <ravi.v.shankar@...el.com>,
Ben Segall <bsegall@...gle.com>,
Daniel Bristot de Oliveira <bristot@...hat.com>,
Dietmar Eggemann <dietmar.eggemann@....com>,
Len Brown <len.brown@...el.com>, Mel Gorman <mgorman@...e.de>,
"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
Steven Rostedt <rostedt@...dmis.org>,
Tim Chen <tim.c.chen@...ux.intel.com>,
Valentin Schneider <vschneid@...hat.com>,
Lukasz Luba <lukasz.luba@....com>,
Ionela Voinescu <ionela.voinescu@....com>, x86@...nel.org,
"Joel Fernandes (Google)" <joel@...lfernandes.org>,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
"Tim C . Chen" <tim.c.chen@...el.com>
Subject: Re: [PATCH v3 21/24] thermal: intel: hfi: Implement model-specific
checks for task classification
On Wed, Mar 29, 2023 at 2:04 AM Ricardo Neri
<ricardo.neri-calderon@...ux.intel.com> wrote:
>
> On Mon, Mar 27, 2023 at 07:03:08PM +0200, Rafael J. Wysocki wrote:
> > On Tue, Feb 7, 2023 at 6:02 AM Ricardo Neri
> > <ricardo.neri-calderon@...ux.intel.com> wrote:
> > >
> > > In Alder Lake and Raptor Lake, the result of thread classification is more
> > > accurate when only one SMT sibling is busy. Classification results for
> > > class 2 and 3 are always reliable.
> > >
> > > To avoid unnecessary migrations, only update the class of a task if it has
> > > been the same during 4 consecutive user ticks.
> > >
> > > Cc: Ben Segall <bsegall@...gle.com>
> > > Cc: Daniel Bristot de Oliveira <bristot@...hat.com>
> > > Cc: Dietmar Eggemann <dietmar.eggemann@....com>
> > > Cc: Ionela Voinescu <ionela.voinescu@....com>
> > > Cc: Joel Fernandes (Google) <joel@...lfernandes.org>
> > > Cc: Len Brown <len.brown@...el.com>
> > > Cc: Lukasz Luba <lukasz.luba@....com>
> > > Cc: Mel Gorman <mgorman@...e.de>
> > > Cc: Rafael J. Wysocki <rafael.j.wysocki@...el.com>
> > > Cc: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
> > > Cc: Steven Rostedt <rostedt@...dmis.org>
> > > Cc: Tim C. Chen <tim.c.chen@...el.com>
> > > Cc: Valentin Schneider <vschneid@...hat.com>
> > > Cc: x86@...nel.org
> > > Cc: linux-pm@...r.kernel.org
> > > Cc: linux-kernel@...r.kernel.org
> > > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
> > > ---
> > > Changes since v2:
> > > * None
> > >
> > > Changes since v1:
> > > * Adjusted the result the classification of Intel Thread Director to start
> > > at class 1. Class 0 for the scheduler means that the task is
> > > unclassified.
> > > * Used the new names of the IPC classes members in task_struct.
> > > * Reworked helper functions to use sched_smt_siblings_idle() to query
> > > the idle state of the SMT siblings of a CPU.
> > > ---
> > > drivers/thermal/intel/intel_hfi.c | 60 ++++++++++++++++++++++++++++++-
> > > 1 file changed, 59 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/thermal/intel/intel_hfi.c b/drivers/thermal/intel/intel_hfi.c
> > > index 35d947f47550..fdb53e4cabc1 100644
> > > --- a/drivers/thermal/intel/intel_hfi.c
> > > +++ b/drivers/thermal/intel/intel_hfi.c
> > > @@ -40,6 +40,7 @@
> > > #include <linux/workqueue.h>
> > >
> > > #include <asm/msr.h>
> > > +#include <asm/intel-family.h>
> > >
> > > #include "../thermal_core.h"
> > > #include "intel_hfi.h"
> > > @@ -209,9 +210,64 @@ static int __percpu *hfi_ipcc_scores;
> > > */
> > > #define HFI_UNCLASSIFIED_DEFAULT 1
> > >
> > > +#define CLASS_DEBOUNCER_SKIPS 4
> > > +
> > > +/**
> > > + * debounce_and_update_class() - Process and update a task's classification
> > > + *
> > > + * @p: The task of which the classification will be updated
> > > + * @new_ipcc: The new IPC classification
> > > + *
> > > + * Update the classification of @p with the new value that hardware provides.
> > > + * Only update the classification of @p if it has been the same during
> > > + * CLASS_DEBOUNCER_SKIPS consecutive ticks.
> > > + */
> > > +static void debounce_and_update_class(struct task_struct *p, u8 new_ipcc)
> > > +{
> > > + u16 debounce_skip;
> > > +
> > > + /* The class of @p changed. Only restart the debounce counter. */
> > > + if (p->ipcc_tmp != new_ipcc) {
> > > + p->ipcc_cntr = 1;
> > > + goto out;
> > > + }
> > > +
> > > + /*
> > > + * The class of @p did not change. Update it if it has been the same
> > > + * for CLASS_DEBOUNCER_SKIPS user ticks.
> > > + */
> > > + debounce_skip = p->ipcc_cntr + 1;
> > > + if (debounce_skip < CLASS_DEBOUNCER_SKIPS)
> > > + p->ipcc_cntr++;
> > > + else
> > > + p->ipcc = new_ipcc;
> > > +
> > > +out:
> > > + p->ipcc_tmp = new_ipcc;
> > > +}
> >
> > Why does the code above belong to the Intel HFI driver? It doesn't
> > look like there is anything driver-specific in it.
>
> That is a good point. This post-processing is specific to the
> implementation of IPCC classes using Intel Thread Director.
Well, the implementation-specific part is the processor model check
whose only contribution is to say whether or not the classification is
valid. The rest appears to be fairly generic to me.
> Maybe a new file called drivers/thermal/intel/intel_itd.c would be better?
So which part of this code other than the processor model check
mentioned above is Intel-specific?
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