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Message-ID: <fa3d3f99-59f4-7397-7a7b-e342ed39dd00@gmail.com>
Date:   Thu, 30 Mar 2023 19:31:36 +0200
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Alexandre Mergnat <amergnat@...libre.com>,
        Wim Van Sebroeck <wim@...ux-watchdog.org>,
        Guenter Roeck <linux@...ck-us.net>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        Chaotian Jing <chaotian.jing@...iatek.com>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Wenbin Mei <wenbin.mei@...iatek.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Zhiyong Tao <zhiyong.tao@...iatek.com>,
        Bernhard Rosenkränzer <bero@...libre.com>
Cc:     linux-watchdog@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-mmc@...r.kernel.org,
        linux-gpio@...r.kernel.org,
        Alexandre Bailon <abailon@...libre.com>,
        Fabien Parent <fparent@...libre.com>,
        Amjad Ouled-Ameur <aouledameur@...libre.com>
Subject: Re: [PATCH v3 12/17] arm64: dts: mediatek: add ethernet support for
 mt8365 SoC



On 29/03/2023 10:54, Alexandre Mergnat wrote:
> This IP is a 10/100 MAC controller compliant with IEEE 802.3 standards.
> It supports power management with Energy Efficient Ethernet and Wake-on-LAN
> specification. Flow control is provided for half-duplex and full-duplex
> mode. For packet transmission and reception, the controller supports
> IPv4/UDP/TCP checksum offload and VLAN tag insertion.
> 
> Signed-off-by: Alexandre Mergnat <amergnat@...libre.com>

Applied thanks!

> ---
>   arch/arm64/boot/dts/mediatek/mt8365.dtsi | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
> index a67eeca28da5..394a5a61be59 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
> @@ -438,6 +438,18 @@ mmc2: mmc@...50000 {
>   			status = "disabled";
>   		};
>   
> +		ethernet: ethernet@...a0000 {
> +			compatible = "mediatek,mt8365-eth";
> +			reg = <0 0x112a0000 0 0x1000>;
> +			mediatek,pericfg = <&infracfg>;
> +			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&topckgen CLK_TOP_ETH_SEL>,
> +				 <&infracfg CLK_IFR_NIC_AXI>,
> +				 <&infracfg CLK_IFR_NIC_SLV_AXI>;
> +			clock-names = "core", "reg", "trans";
> +			status = "disabled";
> +		};
> +
>   		u3phy: t-phy@...c0000 {
>   			compatible = "mediatek,mt8365-tphy", "mediatek,generic-tphy-v2";
>   			#address-cells = <1>;
> 

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