linux-kernel - Re: [PATCH v1] perf vendor events intel: Update ivybridge and ivytown

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Message-ID: <ZCX8d7ZSUdTGk1Jj@kernel.org>
Date:   Thu, 30 Mar 2023 18:17:43 -0300
From:   Arnaldo Carvalho de Melo <acme@...nel.org>
To:     Ian Rogers <irogers@...gle.com>
Cc:     Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...nel.org>,
        Namhyung Kim <namhyung@...nel.org>,
        Zhengjun Xing <zhengjun.xing@...ux.intel.com>,
        Kan Liang <kan.liang@...ux.intel.com>,
        linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
        Edward Baker <edward.baker@...el.com>
Subject: Re: [PATCH v1] perf vendor events intel: Update ivybridge and ivytown

Em Tue, Mar 28, 2023 at 04:41:42PM -0700, Ian Rogers escreveu:
> Update to versions 24 and 23 respectively. Adds the event
> BR_MISP_EXEC.INDIRECT.

Thanks, applied.

- Arnaldo

 
> Signed-off-by: Ian Rogers <irogers@...gle.com>
> ---
>  tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json | 8 ++++++++
>  tools/perf/pmu-events/arch/x86/ivytown/pipeline.json   | 8 ++++++++
>  tools/perf/pmu-events/arch/x86/mapfile.csv             | 4 ++--
>  3 files changed, 18 insertions(+), 2 deletions(-)
> 
> diff --git a/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json b/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json
> index d1e64e0d683e..30a3da9cd22b 100644
> --- a/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json
> +++ b/tools/perf/pmu-events/arch/x86/ivybridge/pipeline.json
> @@ -215,6 +215,14 @@
>          "SampleAfterValue": "200003",
>          "UMask": "0xc4"
>      },
> +    {
> +        "BriefDescription": "Speculative mispredicted indirect branches",
> +        "EventCode": "0x89",
> +        "EventName": "BR_MISP_EXEC.INDIRECT",
> +        "PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Counts for indirect near CALL or JMP instructions (RET excluded).",
> +        "SampleAfterValue": "200003",
> +        "UMask": "0xe4"
> +    },
>      {
>          "BriefDescription": "Not taken speculative and retired mispredicted macro conditional branches",
>          "EventCode": "0x89",
> diff --git a/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json b/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json
> index d1e64e0d683e..30a3da9cd22b 100644
> --- a/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json
> +++ b/tools/perf/pmu-events/arch/x86/ivytown/pipeline.json
> @@ -215,6 +215,14 @@
>          "SampleAfterValue": "200003",
>          "UMask": "0xc4"
>      },
> +    {
> +        "BriefDescription": "Speculative mispredicted indirect branches",
> +        "EventCode": "0x89",
> +        "EventName": "BR_MISP_EXEC.INDIRECT",
> +        "PublicDescription": "Counts speculatively miss-predicted indirect branches at execution time. Counts for indirect near CALL or JMP instructions (RET excluded).",
> +        "SampleAfterValue": "200003",
> +        "UMask": "0xe4"
> +    },
>      {
>          "BriefDescription": "Not taken speculative and retired mispredicted macro conditional branches",
>          "EventCode": "0x89",
> diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-events/arch/x86/mapfile.csv
> index 41d755d570e6..97b3ffc284a6 100644
> --- a/tools/perf/pmu-events/arch/x86/mapfile.csv
> +++ b/tools/perf/pmu-events/arch/x86/mapfile.csv
> @@ -14,8 +14,8 @@ GenuineIntel-6-(3C|45|46),v33,haswell,core
>  GenuineIntel-6-3F,v27,haswellx,core
>  GenuineIntel-6-(7D|7E|A7),v1.17,icelake,core
>  GenuineIntel-6-6[AC],v1.19,icelakex,core
> -GenuineIntel-6-3A,v23,ivybridge,core
> -GenuineIntel-6-3E,v22,ivytown,core
> +GenuineIntel-6-3A,v24,ivybridge,core
> +GenuineIntel-6-3E,v23,ivytown,core
>  GenuineIntel-6-2D,v23,jaketown,core
>  GenuineIntel-6-(57|85),v10,knightslanding,core
>  GenuineIntel-6-A[AC],v1.01,meteorlake,core
> -- 
> 2.40.0.348.gf938b09366-goog
> 

-- 

- Arnaldo