lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZCVJv-erahM_Jdug@kroah.com>
Date:   Thu, 30 Mar 2023 10:35:11 +0200
From:   Greg KH <gregkh@...uxfoundation.org>
To:     Julien Panis <jpanis@...libre.com>
Cc:     lee@...nel.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, corbet@....net, arnd@...db.de,
        derek.kiernan@...inx.com, dragan.cvetic@...inx.com,
        yi.l.liu@...el.com, jgg@...pe.ca, razor@...ckwall.org,
        stephen@...workplumber.org, prabhakar.csengg@...il.com,
        contact@...rsion.fr, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
        sterzik@...com, u-kumar1@...com, eblanc@...libre.com,
        jneanne@...libre.com
Subject: Re: [PATCH v5 4/4] misc: tps6594-pfsm: Add driver for TI TPS6594 PFSM

On Thu, Mar 30, 2023 at 10:20:06AM +0200, Julien Panis wrote:
> This PFSM controls the operational modes of the PMIC:
> - STANDBY and LP_STANDBY,
> - ACTIVE state,
> - MCU_ONLY state,
> - RETENTION state, with or without DDR and/or GPIO retention.
> Depending on the current operational mode, some voltage domains
> remain energized while others can be off.
> 
> This PFSM is also used to trigger a firmware update, and provides
> R/W access to device registers.

What userspace code uses these new ioctls?  Do you have a pointer to it
anywhere?

> --- /dev/null
> +++ b/include/uapi/linux/tps6594_pfsm.h
> @@ -0,0 +1,45 @@
> +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
> +/*
> + * Userspace ABI for TPS6594 PMIC Pre-configurable Finite State Machine
> + *
> + * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/
> + */
> +
> +#ifndef __TPS6594_PFSM_H
> +#define __TPS6594_PFSM_H
> +
> +#include <linux/const.h>
> +#include <linux/ioctl.h>
> +#include <linux/types.h>
> +
> +/* PFSM state definitions */
> +enum pfsm_state {
> +	PMIC_ACTIVE_STATE,
> +	PMIC_MCU_ONLY_STATE,
> +	PMIC_RETENTION_STATE
> +};
> +
> +/**
> + * struct pmic_state - PMIC state identification
> + * @state:   PFSM destination state
> + * @options: options for destination state
> + */
> +struct pmic_state {
> +	enum pfsm_state state;
> +	__u8 options;
> +};
> +
> +/* Commands */
> +#define	PMIC_BASE			'P'
> +
> +#define	PMIC_GOTO_STANDBY		_IO(PMIC_BASE, 0)
> +#define	PMIC_GOTO_LP_STANDBY		_IO(PMIC_BASE, 1)
> +#define	PMIC_UPDATE_PGM			_IO(PMIC_BASE, 2)
> +#define	PMIC_SET_STATE			_IOW(PMIC_BASE, 3, struct pmic_state)
> +
> +/* Options for destination state */
> +#define PMIC_GPIO_RETENTION		_BITUL(0)
> +#define PMIC_DDR_RETENTION		_BITUL(1)
> +#define PMIC_MCU_ONLY_STARTUP_DEST	_BITUL(2)

Please read Documentation/driver-api/ioctl.rst which says:

* Bitfields and enums generally work as one would expect them to,
  but some properties of them are implementation-defined, so it is
  better to avoid them completely in ioctl interfaces.

For a brand-new ioctl interface, you did both of these unrecommended
things.  Why set yourself for complexity when you do not need to?

thanks,

greg k-h

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ