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Message-Id: <20230330095140.3384441-1-michael@walle.cc>
Date:   Thu, 30 Mar 2023 11:51:40 +0200
From:   Michael Walle <michael@...le.cc>
To:     vaibhaavram.tl@...rochip.com
Cc:     Tharunkumar.Pasumarthi@...rochip.com, UNGLinuxDriver@...rochip.com,
        arnd@...db.de, gregkh@...uxfoundation.org,
        linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
        Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
        Michael Walle <michael@...le.cc>
Subject: Re: [PATCH v8 char-misc-next 3/5] misc: microchip: pci1xxxx: Add EEPROM Functionality to read and write into EEPROM bin sysfs

[First, please CC people who did comments on previous versions.]

> > > Microchip's pci1xxxx is an unmanaged PCIe3.1a switch for consumer,
> > > industrial, and automotive applications. This switch integrates OTP
> > > and EEPROM to enable customization of the part in the field.
> > > This patch adds EEPROM functionality to support the same.
> > 
> > Again, why not use the in-kernel eeprom api instead?
> Unlike other in-Kernel EEPROM APIs, this EEPROM is not accessible
> through any of the i2c/spi buses available to the kernel.

I fail to see how this matters. NVMEM has a generic read/write callback.
There is no dependency on I2C or SPI. Again, you should look into nvmem.
And it should be perfectly fine to use nvmem without nvmem cells at all.

With CONFIG_NVMEM_SYSFS you should get a "nvmem" binary file in sysfs.
Wit config->compat set (although I don't know if that is recommended) you
should get an "eeprom" binary file in sysfs.

> It is only accessible through the register interface available in the
> EEPROM controller of the PCI1XXXX device.

-michael

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