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Message-ID: <a6a150f332b44914ac286550b63feab0@AcuMS.aculab.com>
Date:   Fri, 31 Mar 2023 15:59:44 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     "'Kirill A. Shutemov'" <kirill@...temov.name>,
        Tom Lendacky <thomas.lendacky@....com>
CC:     'Wu Zongyong' <wuzongyong@...ux.alibaba.com>,
        "kirill.shutemov@...ux.intel.com" <kirill.shutemov@...ux.intel.com>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
        "x86@...nel.org" <x86@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "tony.luck@...el.com" <tony.luck@...el.com>,
        "wutu.xq2@...ux.alibaba.com" <wutu.xq2@...ux.alibaba.com>
Subject: RE: [RFC PATCH] x86/insn: support decode MOVSXD instruction for MMIO

From: Kirill A. Shutemov
> Sent: 31 March 2023 16:25
...
> > No, SEV doesn't support userspace MMIO.
> 
> But where do you filter out userspace MMIO? AFAICS, it goes straight from
> from #VC to insn_decode_mmio(). Hm?

Probably by making vm_iomap_memory() fail.

Otherwise MOVSXD is the least of your problems.
You'd need to worry about all the AVX opcodes as well.

Although you might even find kernel code that is using
kernel_fpu_begin/end() to wrap mmio copies that use the
big AVX512 registers.
When each PCIe read takes about 1us (measured into our fpga)
increasing the TLP to 64 bytes (from 8) makes a massive
difference to buffer reads.
(Mostly we try to get the fpga to do writes instead.)

	David

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