linux-kernel - Re: [PATCH 00/21] dma-mapping: unify support for cache flushes

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Message-Id: <578fda41-4a69-44f5-8a58-1eacd49e1347@app.fastmail.com>
Date:   Fri, 31 Mar 2023 22:27:29 +0200
From:   "Arnd Bergmann" <arnd@...db.de>
To:     "Catalin Marinas" <catalin.marinas@....com>,
        "Arnd Bergmann" <arnd@...nel.org>
Cc:     linux-kernel@...r.kernel.org, "Vineet Gupta" <vgupta@...nel.org>,
        "Russell King" <linux@...linux.org.uk>,
        "Neil Armstrong" <neil.armstrong@...aro.org>,
        "Linus Walleij" <linus.walleij@...aro.org>,
        "Will Deacon" <will@...nel.org>, guoren <guoren@...nel.org>,
        "Brian Cain" <bcain@...cinc.com>,
        "Geert Uytterhoeven" <geert@...ux-m68k.org>,
        "Michal Simek" <monstr@...str.eu>,
        "Thomas Bogendoerfer" <tsbogend@...ha.franken.de>,
        "Dinh Nguyen" <dinguyen@...nel.org>,
        "Stafford Horne" <shorne@...il.com>,
        "Helge Deller" <deller@....de>,
        "Michael Ellerman" <mpe@...erman.id.au>,
        "Christophe Leroy" <christophe.leroy@...roup.eu>,
        "Paul Walmsley" <paul.walmsley@...ive.com>,
        "Palmer Dabbelt" <palmer@...belt.com>,
        "Rich Felker" <dalias@...c.org>,
        "John Paul Adrian Glaubitz" <glaubitz@...sik.fu-berlin.de>,
        "David S . Miller" <davem@...emloft.net>,
        "Max Filippov" <jcmvbkbc@...il.com>,
        "Christoph Hellwig" <hch@....de>,
        "Robin Murphy" <robin.murphy@....com>,
        "Lad, Prabhakar" <prabhakar.mahadev-lad.rj@...renesas.com>,
        "Conor.Dooley" <conor.dooley@...rochip.com>,
        linux-snps-arc@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org,
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Subject: Re: [PATCH 00/21] dma-mapping: unify support for cache flushes

On Fri, Mar 31, 2023, at 18:53, Catalin Marinas wrote:
> On Mon, Mar 27, 2023 at 02:12:56PM +0200, Arnd Bergmann wrote:
>> Another difference that I do not address here is what cache invalidation
>> does for partical cache lines. On arm32, arm64 and powerpc, a partial
>> cache line always gets written back before invalidation in order to
>> ensure that data before or after the buffer is not discarded. On all
>> other architectures, the assumption is cache lines are never shared
>> between DMA buffer and data that is accessed by the CPU.
>
> I don't think sharing the DMA buffer with other data is safe even with
> this clean+invalidate on the unaligned cache. Mapping the DMA buffer as
> FROM_DEVICE or BIDIRECTIONAL can cause the shared cache line to be
> evicted and override the device written data. This sharing only works if
> the CPU guarantees not to dirty the corresponding cache line.
>
> I'm fine with removing this partial cache line hack from arm64 as it's
> not safe anyway. We'll see if any driver stops working. If there's some
> benign sharing (I wouldn't trust it), the cache cleaning prior to
> mapping and invalidate on unmap would not lose any data.

Ok, I'll add a patch to remove that bit from dcache_inval_poc
then. Do you know if any of the the other callers of this function
rely on on the writeback behavior, or is it safe to remove it for
all of them?

Note that before c50f11c6196f ("arm64: mm: Don't invalidate
FROM_DEVICE buffers at start of DMA transfer"), it made some
sense to write back partial cache lines before a DMA_FROM_DEVICE,
in order to allow sharing read-only data in them the same way as
on arm32 and powerpc. Doing the writeback in the sync_for_cpu
bit is of course always pointless.

       Arnd