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Message-ID: <CA+V-a8u_rc=5Bv--Ong72CDC_CNvt6xfALUWLDYJo36yBUpAqA@mail.gmail.com>
Date: Fri, 31 Mar 2023 11:47:34 +0100
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Conor Dooley <conor.dooley@...rochip.com>
Cc: Arnd Bergmann <arnd@...db.de>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Heiko Stuebner <heiko@...ech.de>, Guo Ren <guoren@...nel.org>,
Andrew Jones <ajones@...tanamicro.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Samuel Holland <samuel@...lland.org>,
linux-riscv@...ts.infradead.org, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
Biju Das <biju.das.jz@...renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v7 4/6] dt-bindings: cache: r9a07g043f-l2-cache: Add DT
binding documentation for L2 cache controller
Hi Conor,
THank you for the review.
On Fri, Mar 31, 2023 at 11:22 AM Conor Dooley
<conor.dooley@...rochip.com> wrote:
>
> $subject: t-bindings: cache: r9a07g043f-l2-cache: Add DT binding documentation for L2 cache controller
> ^^^^^^^^^^^^^^^^^^^
> I assume this should be updated to be ax45mp-foo instead?
>
Agreed, I'll fix this in the next version.
Cheers,
Prabhakar
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