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Message-Id: <08eace10-3eee-481a-b1b4-de58e94cd828@app.fastmail.com>
Date: Fri, 31 Mar 2023 13:36:11 +0200
From: "Arnd Bergmann" <arnd@...db.de>
To: "Conor.Dooley" <conor.dooley@...rochip.com>,
Prabhakar <prabhakar.csengg@...il.com>
Cc: "Geert Uytterhoeven" <geert+renesas@...der.be>,
Heiko Stübner <heiko@...ech.de>,
guoren <guoren@...nel.org>,
"Andrew Jones" <ajones@...tanamicro.com>,
"Paul Walmsley" <paul.walmsley@...ive.com>,
"Palmer Dabbelt" <palmer@...belt.com>,
"Albert Ou" <aou@...s.berkeley.edu>,
"Samuel Holland" <samuel@...lland.org>,
linux-riscv@...ts.infradead.org,
"Rob Herring" <robh+dt@...nel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
"Biju Das" <biju.das.jz@...renesas.com>,
"Lad, Prabhakar" <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v7 1/6] riscv: mm: dma-noncoherent: Switch using function pointers
for cache management
On Fri, Mar 31, 2023, at 12:55, Conor Dooley wrote:
> On Fri, Mar 31, 2023 at 11:37:30AM +0100, Lad, Prabhakar wrote:
>>
>
> Does that actually work? I don't think it does.
> If you try to enable RISCV_ISA_ZICBOM then you won't get
> RISC_DMA_NONCOHERENT turned on. Run menuconfig and disable support for
> Renesas, SiFive and T-Head SoCs & you can replicate.
Right, the circular dependency has to be broken in some form.
> I think one of RISCV_ISA_ZICBOM and RISCV_DMA_NONCOHERENT should just be
> dropped, although I don't know which one to pick!
> Making RISCV_DMA_NONCOHERENT user selectable probably makes the most
> sense.
That sounds good to me.
Arnd
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