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Message-ID: <87h6tya70h.fsf@oltmanns.dev>
Date: Sun, 02 Apr 2023 12:49:08 +0200
From: Frank Oltmanns <frank@...manns.dev>
To: Roman Beranek <me@...y.cz>
Cc: Maxime Ripard <mripard@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>,
dri-devel@...ts.freedesktop.org,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] drm: sun4i: calculate proper DCLK rate for DSI
Hi Roman,
On 2023-03-31 at 13:02:45 +0200, Roman Beranek <me@...y.cz> wrote:
> In DSI mode, TCON0's data clock is required to run at 1/4 the per-lane
> bit rate.
>
> Signed-off-by: Roman Beranek <me@...y.cz>
> ---
> drivers/gpu/drm/sun4i/sun4i_tcon.c | 36 +++++++++++++++++-------------
> 1 file changed, 21 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> index eec26b1faa4b..b263de7a8237 100644
> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> @@ -291,18 +291,6 @@ static int sun4i_tcon_get_clk_delay(const struct drm_display_mode *mode,
> return delay;
> }
>
> -static void sun4i_tcon0_mode_set_common(struct sun4i_tcon *tcon,
> - const struct drm_display_mode *mode)
> -{
> - /* Configure the dot clock */
> - clk_set_rate(tcon->dclk, mode->crtc_clock * 1000);
> -
> - /* Set the resolution */
> - regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG,
> - SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) |
> - SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay));
> -}
> -
> static void sun4i_tcon0_mode_set_dithering(struct sun4i_tcon *tcon,
> const struct drm_connector *connector)
> {
> @@ -367,10 +355,18 @@ static void sun4i_tcon0_mode_set_cpu(struct sun4i_tcon *tcon,
> u32 block_space, start_delay;
> u32 tcon_div;
>
> + /*
> + * dclk is required to run at 1/4 the DSI per-lane bit rate.
> + */
> tcon->dclk_min_div = SUN6I_DSI_TCON_DIV;
> tcon->dclk_max_div = SUN6I_DSI_TCON_DIV;
> + clk_set_rate(tcon->dclk, mode->crtc_clock * 1000 * (bpp / lanes)
> + / SUN6I_DSI_TCON_DIV);
When apply this to drm-next my panel stays dark. I haven't figured out
yet why, though. The other two patches in this series work fine, i.e.
they have no effect as they are just a refactoring.
I'm testing this on my pinephone. It's the same with the patch I
submitted. For whatever reason, it no longer works on drm-next.
At the time I'm writing this, drm-next is at 82bbec189ab3 "Merge
v6.3-rc4 into drm-next".
Does it work for you? And if so, on which commit are you basing this
series?
Thanks,
Frank
>
> - sun4i_tcon0_mode_set_common(tcon, mode);
> + /* Set the resolution */
> + regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG,
> + SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) |
> + SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay));
>
> /* Set dithering if needed */
> sun4i_tcon0_mode_set_dithering(tcon, sun4i_tcon_get_connector(encoder));
> @@ -438,7 +434,12 @@ static void sun4i_tcon0_mode_set_lvds(struct sun4i_tcon *tcon,
>
> tcon->dclk_min_div = 7;
> tcon->dclk_max_div = 7;
> - sun4i_tcon0_mode_set_common(tcon, mode);
> + clk_set_rate(tcon->dclk, mode->crtc_clock * 1000);
> +
> + /* Set the resolution */
> + regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG,
> + SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) |
> + SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay));
>
> /* Set dithering if needed */
> sun4i_tcon0_mode_set_dithering(tcon, sun4i_tcon_get_connector(encoder));
> @@ -515,7 +516,12 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
>
> tcon->dclk_min_div = tcon->quirks->dclk_min_div;
> tcon->dclk_max_div = 127;
> - sun4i_tcon0_mode_set_common(tcon, mode);
> + clk_set_rate(tcon->dclk, mode->crtc_clock * 1000);
> +
> + /* Set the resolution */
> + regmap_write(tcon->regs, SUN4I_TCON0_BASIC0_REG,
> + SUN4I_TCON0_BASIC0_X(mode->crtc_hdisplay) |
> + SUN4I_TCON0_BASIC0_Y(mode->crtc_vdisplay));
>
> /* Set dithering if needed */
> sun4i_tcon0_mode_set_dithering(tcon, connector);
--
--
Frank Oltmanns
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