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Message-ID: <BYAPR21MB1688814591F2C482CC945F6FD78D9@BYAPR21MB1688.namprd21.prod.outlook.com>
Date: Sun, 2 Apr 2023 02:36:15 +0000
From: "Michael Kelley (LINUX)" <mikelley@...rosoft.com>
To: Juergen Gross <jgross@...e.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"x86@...nel.org" <x86@...nel.org>,
"linux-hyperv@...r.kernel.org" <linux-hyperv@...r.kernel.org>
CC: KY Srinivasan <kys@...rosoft.com>,
Haiyang Zhang <haiyangz@...rosoft.com>,
Wei Liu <wei.liu@...nel.org>, Dexuan Cui <decui@...rosoft.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"H. Peter Anvin" <hpa@...or.com>
Subject: RE: [PATCH v5 05/15] x86/hyperv: set MTRR state when running as
SEV-SNP Hyper-V guest
From: Juergen Gross <jgross@...e.com> Sent: Friday, March 31, 2023 11:37 PM
>
> In order to avoid mappings using the UC- cache attribute, set the
> MTRR state to use WB caching as the default.
>
> This is needed in order to cope with the fact that PAT is enabled,
> while MTRRs are not supported by the hypervisor.
>
> Fixes: 90b926e68f50 ("x86/pat: Fix pat_x_mtrr_type() for MTRR disabled case")
> Signed-off-by: Juergen Gross <jgross@...e.com>
> Tested-by: Michael Kelley <mikelley@...rosoft.com>
I've tested the full v5 series in a Hyper-V SEV-SNP guest with vTOM. All looks
good. The following output appears in dmesg, which I think matches expectations:
[ 0.004000] MTRR map: 0 entries (0 fixed + 0 variable; max 0), built from 0 variable MTRRs
[ 0.004000] MTRRs set to read-only
[ 0.004000] x86/PAT: Configuration [0-7]: WB WC UC- UC WB WP UC- WT
The page attributes listed in /sys/kernel/debug/x86/pat_memtype_list are
"write-back" in the expected cases, and the "mtrr" x86 feature no longer appears
in the "flags" output of "lscpu" or /proc/cpuinfo. /proc/mtrr does not exist, again
as expected.
> ---
> V2:
> - new patch
> ---
> arch/x86/kernel/cpu/mshyperv.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c
> index f36dc2f796c5..0a6cc3cf8919 100644
> --- a/arch/x86/kernel/cpu/mshyperv.c
> +++ b/arch/x86/kernel/cpu/mshyperv.c
> @@ -34,6 +34,7 @@
> #include <clocksource/hyperv_timer.h>
> #include <asm/numa.h>
> #include <asm/coco.h>
> +#include <asm/mtrr.h>
>
> /* Is Linux running as the root partition? */
> bool hv_root_partition;
> @@ -408,6 +409,9 @@ static void __init ms_hyperv_init_platform(void)
> #ifdef CONFIG_SWIOTLB
> swiotlb_unencrypted_base =
> ms_hyperv.shared_gpa_boundary;
> #endif
> +
> + /* Set WB as the default cache mode. */
> + mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK);
The placement of this call needs to change due to a patch set I submitted and
that Boris has accepted into the 'tip' tree for the 6.4 merge window (so it's now
in linux-next). The call should be placed in the function hv_vtom_init() in the
source file arch/x86/hyperv/ivm.c. Anywhere in hv_vtom_init() is fine -- I would
suggest at the end.
Minor request: In a v6 of this patch set, please include me on all the patches in
the series so I can easily keep track of how it is progressing.
Michael
> }
> /* Isolation VMs are unenlightened SEV-based VMs, thus this check: */
> if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT)) {
> --
> 2.35.3
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