[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20230403200530.2103099-1-abel.vesa@linaro.org>
Date: Mon, 3 Apr 2023 23:05:24 +0300
From: Abel Vesa <abel.vesa@...aro.org>
To: Ulf Hansson <ulf.hansson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Manivannan Sadhasivam <mani@...nel.org>,
Alim Akhtar <alim.akhtar@...sung.com>,
Avri Altman <avri.altman@....com>,
Bart Van Assche <bvanassche@....org>,
Adrian Hunter <adrian.hunter@...el.com>,
"James E . J . Bottomley" <jejb@...ux.ibm.com>,
"Martin K . Petersen" <martin.petersen@...cle.com>,
Herbert Xu <herbert@...dor.apana.org.au>,
"David S . Miller" <davem@...emloft.net>,
Eric Biggers <ebiggers@...nel.org>
Cc: linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-arm-msm@...r.kernel.org, linux-crypto@...r.kernel.org,
linux-scsi@...r.kernel.org
Subject: [PATCH v5 0/6] Add dedicated Qcom ICE driver
As both SDCC and UFS drivers use the ICE with duplicated implementation,
while none of the currently supported platforms make use concomitantly
of the same ICE IP block instance, the new SM8550 allows both UFS and
SDCC to do so. In order to support such scenario, there is a need for
a unified implementation and a devicetree node to be shared between
both types of storage devices. So lets drop the duplicate implementation
of the ICE from both SDCC and UFS and make it a dedicated (soc) driver.
Also, switch all UFS and SDCC devicetree nodes to use the new ICE
approach.
The v4 is here:
https://lore.kernel.org/all/20230327134734.3256974-1-abel.vesa@linaro.org/
Changes since v4:
* dropped the SDHCI dt-bindings patch as it will be added along
with the first use of qcom,ice property from an SDHCI DT node
See each individual patch for changelogs.
Abel Vesa (6):
dt-bindings: crypto: Add Qualcomm Inline Crypto Engine
dt-bindings: ufs: qcom: Add ICE phandle
soc: qcom: Make the Qualcomm UFS/SDCC ICE a dedicated driver
scsi: ufs: ufs-qcom: Switch to the new ICE API
mmc: sdhci-msm: Switch to the new ICE API
arm64: dts: qcom: sm8550: Add the Inline Crypto Engine node
.../crypto/qcom,inline-crypto-engine.yaml | 42 ++
.../devicetree/bindings/ufs/qcom,ufs.yaml | 19 +
arch/arm64/boot/dts/qcom/sm8550.dtsi | 10 +
drivers/mmc/host/Kconfig | 2 +-
drivers/mmc/host/sdhci-msm.c | 220 +++--------
drivers/soc/qcom/Kconfig | 4 +
drivers/soc/qcom/Makefile | 1 +
drivers/soc/qcom/ice.c | 365 ++++++++++++++++++
drivers/ufs/host/Kconfig | 2 +-
drivers/ufs/host/Makefile | 4 +-
drivers/ufs/host/ufs-qcom-ice.c | 244 ------------
drivers/ufs/host/ufs-qcom.c | 97 ++++-
drivers/ufs/host/ufs-qcom.h | 32 +-
include/soc/qcom/ice.h | 37 ++
14 files changed, 626 insertions(+), 453 deletions(-)
create mode 100644 Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
create mode 100644 drivers/soc/qcom/ice.c
delete mode 100644 drivers/ufs/host/ufs-qcom-ice.c
create mode 100644 include/soc/qcom/ice.h
--
2.34.1
Powered by blists - more mailing lists