linux-kernel - Re: [PATCH v2] ARM: dts: stm32: add FMC support on STM32MP13x SoC family

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Date:   Mon, 3 Apr 2023 10:20:50 +0200
From:   Alexandre TORGUE <alexandre.torgue@...s.st.com>
To:     Christophe Kerello <christophe.kerello@...s.st.com>,
        <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>
CC:     <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>
Subject: Re: [PATCH v2] ARM: dts: stm32: add FMC support on STM32MP13x SoC
 family

Hi christophe

On 3/28/23 19:07, Christophe Kerello wrote:
> Add FMC support on STM32MP13x SoC family.
> 
> Signed-off-by: Christophe Kerello <christophe.kerello@...s.st.com>
> ---


Applied on stm32-next.

Thanks.
Alex

> Changes in v2:
>   - compatible, reg and ranges properties have been moved at the top of each node
> 
>   arch/arm/boot/dts/stm32mp131.dtsi | 33 +++++++++++++++++++++++++++++++
>   1 file changed, 33 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
> index 9ea61687f023..7ea1fe0cd070 100644
> --- a/arch/arm/boot/dts/stm32mp131.dtsi
> +++ b/arch/arm/boot/dts/stm32mp131.dtsi
> @@ -1232,6 +1232,39 @@ mdma: dma-controller@...00000 {
>   			dma-requests = <48>;
>   		};
>   
> +		fmc: memory-controller@...02000 {
> +			compatible = "st,stm32mp1-fmc2-ebi";
> +			reg = <0x58002000 0x1000>;
> +			ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */
> +				 <1 0 0x64000000 0x04000000>, /* EBI CS 2 */
> +				 <2 0 0x68000000 0x04000000>, /* EBI CS 3 */
> +				 <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */
> +				 <4 0 0x80000000 0x10000000>; /* NAND */
> +			#address-cells = <2>;
> +			#size-cells = <1>;
> +			clocks = <&rcc FMC_K>;
> +			resets = <&rcc FMC_R>;
> +			status = "disabled";
> +
> +			nand-controller@4,0 {
> +				compatible = "st,stm32mp1-fmc2-nfc";
> +				reg = <4 0x00000000 0x1000>,
> +				      <4 0x08010000 0x1000>,
> +				      <4 0x08020000 0x1000>,
> +				      <4 0x01000000 0x1000>,
> +				      <4 0x09010000 0x1000>,
> +				      <4 0x09020000 0x1000>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> +				dmas = <&mdma 24 0x2 0x12000a02 0x0 0x0>,
> +				       <&mdma 24 0x2 0x12000a08 0x0 0x0>,
> +				       <&mdma 25 0x2 0x12000a0a 0x0 0x0>;
> +				dma-names = "tx", "rx", "ecc";
> +				status = "disabled";
> +			};
> +		};
> +
>   		sdmmc1: mmc@...05000 {
>   			compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
>   			arm,primecell-periphid = <0x20253180>;