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Message-ID: <f4721c8a-d4f0-d391-b9c9-d1a8cf5538b4@foss.st.com>
Date: Mon, 3 Apr 2023 11:23:16 +0200
From: Alexandre TORGUE <alexandre.torgue@...s.st.com>
To: <patrice.chotard@...s.st.com>, <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
CC: <linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>
Subject: Re: [PATCH] ARM: dts: stm32: Add QSPI support on STM32MP13x SoC
family
hi Patrice
On 3/31/23 09:19, patrice.chotard@...s.st.com wrote:
> From: Patrice Chotard <patrice.chotard@...s.st.com>
>
> Add QSPI support on STM32MP13x SoC family
>
> Signed-off-by: Patrice Chotard <patrice.chotard@...s.st.com>
> ---
> arch/arm/boot/dts/stm32mp131.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
> index 5949473cbbfd..544c755b6e67 100644
> --- a/arch/arm/boot/dts/stm32mp131.dtsi
> +++ b/arch/arm/boot/dts/stm32mp131.dtsi
> @@ -1137,6 +1137,21 @@ mdma: dma-controller@...00000 {
> dma-requests = <48>;
> };
>
> + qspi: spi@...03000 {
> + compatible = "st,stm32f469-qspi";
> + reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
> + reg-names = "qspi", "qspi_mm";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
> + dmas = <&mdma 26 0x2 0x10100002 0x0 0x0>,
> + <&mdma 26 0x2 0x10100008 0x0 0x0>;
> + dma-names = "tx", "rx";
> + clocks = <&rcc QSPI_K>;
> + resets = <&rcc QSPI_R>;
> + status = "disabled";
> + };
> +
> sdmmc1: mmc@...05000 {
> compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
> arm,primecell-periphid = <0x20253180>;
Applied on stm32-next.
Thanks.
Alex
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