lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 3 Apr 2023 12:01:10 +0000
From:   Vinod Polimera <vpolimer@....qualcomm.com>
To:     "dmitry.baryshkov@...aro.org" <dmitry.baryshkov@...aro.org>,
        "Vinod Polimera (QUIC)" <quic_vpolimer@...cinc.com>
CC:     "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
        "linux-arm-msm@...r.kernel.org" <linux-arm-msm@...r.kernel.org>,
        "freedreno@...ts.freedesktop.org" <freedreno@...ts.freedesktop.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "robdclark@...il.com" <robdclark@...il.com>,
        "dianders@...omium.org" <dianders@...omium.org>,
        "swboyd@...omium.org" <swboyd@...omium.org>,
        "Kalyan Thota (QUIC)" <quic_kalyant@...cinc.com>,
        "Kuogee Hsieh (QUIC)" <quic_khsieh@...cinc.com>,
        "Vishnuvardhan Prodduturi (QUIC)" <quic_vproddut@...cinc.com>,
        "Bjorn Andersson (QUIC)" <quic_bjorande@...cinc.com>,
        "Abhinav Kumar (QUIC)" <quic_abhinavk@...cinc.com>,
        "Sankeerth Billakanti (QUIC)" <quic_sbillaka@...cinc.com>
Subject: RE: [PATCH v1 3/3] msm: skip the atomic commit of self refresh while
 PSR running

> On Fri, 31 Mar 2023 at 16:59, Vinod Polimera <quic_vpolimer@...cinc.com>
> wrote:
> >
> > In certain CPU stress conditions, there can be a delay in scheduling commit
> > work and it was observed that PSR commit from a different work queue
> was
> > scheduled. Avoid these commits as display is already in PSR mode.
> >
> > Signed-off-by: Vinod Polimera <quic_vpolimer@...cinc.com>
> > ---
> >  drivers/gpu/drm/msm/msm_atomic.c | 3 +++
> >  1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/msm/msm_atomic.c
> b/drivers/gpu/drm/msm/msm_atomic.c
> > index 645fe53..f8141bb 100644
> > --- a/drivers/gpu/drm/msm/msm_atomic.c
> > +++ b/drivers/gpu/drm/msm/msm_atomic.c
> > @@ -192,6 +192,9 @@ int msm_atomic_check(struct drm_device *dev,
> struct drm_atomic_state *state)
> >                         new_crtc_state->mode_changed = true;
> >                         state->allow_modeset = true;
> >                 }
> > +
> > +               if (old_crtc_state->self_refresh_active && new_crtc_state-
> >self_refresh_active)
> > +                       return -EINVAL;
> 
> EINVAL here means that atomic_check will fail if both old and new
> states are in SR mode. For example, there might be a mode set for
> another CRTC (while keeping this one in SR mode). I don't think this
> is correct. We should skip/shortcut the commit, that's true. But I
> doubt that returning an error here is a proper way to do this. Please
> correct me if I'm wrong.

If there is a modeset on same crtc with a different connector. The new_crtc_state will not have self_refresh_active set.
Self_refresh_active is set from the helper library, which will duplicate the old_state and just adds self_refresh_active to true and active to false.
so we can be confident that if we are checking for self_refresh_active status then it should be coming from the library call.

Also the EINVAL is returned to the self_refresh library API and the function will be retired.
And self_refresh_active is cleared on every commit : https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/drivers/gpu/drm/drm_atomic_state_helper.c#n158

The above is true for different crtc as well.
please let me know your comments.

Thanks,
Vinod.
 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ