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Message-ID: <20230403-crisping-animosity-04ed8a45c625@spud>
Date: Mon, 3 Apr 2023 17:21:27 +0100
From: Conor Dooley <conor@...nel.org>
To: Björn Töpel <bjorn@...nel.org>
Cc: Albert Ou <aou@...s.berkeley.edu>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
linux-riscv@...ts.infradead.org,
Guo Ren <guoren@...ux.alibaba.com>,
Björn Töpel <bjorn@...osinc.com>,
Heiko Stübner <heiko@...ech.de>,
Yipeng Zou <zouyipeng@...wei.com>,
linux-kernel@...r.kernel.org, Palmer Dabbelt <palmer@...osinc.com>,
Heiko Stuebner <heiko.stuebner@...ll.eu>
Subject: Re: [PATCH] riscv: entry: Save a0 prior
syscall_enter_from_user_mode()
On Mon, Apr 03, 2023 at 08:52:07AM +0200, Björn Töpel wrote:
> From: Björn Töpel <bjorn@...osinc.com>
>
> The RISC-V calling convention passes the first argument, and the
> return value in the a0 register. For this reason, the a0 register
> needs some extra care; When handling syscalls, the a0 register is
> saved into regs->orig_a0, so a0 can be properly restored for,
> e.g. interrupted syscalls.
>
> This functionality was broken with the introduction of the generic
> entry patches. Here, a0 was saved into orig_a0 after calling
> syscall_enter_from_user_mode(), which can change regs->a0 for some
> paths, incorrectly restoring a0.
>
> This is resolved, by saving a0 prior doing the
> syscall_enter_from_user_mode() call.
>
> Fixes: f0bddf50586d ("riscv: entry: Convert to generic entry")
> Reviewed-by: Heiko Stuebner <heiko.stuebner@...ll.eu>
> Tested-by: Heiko Stuebner <heiko.stuebner@...ll.eu>
> Signed-off-by: Björn Töpel <bjorn@...osinc.com>
As you pointed out, v12 did indeed have this ordering, so *deep breath*
Reported-by: Conor Dooley <conor.dooley@...rochip.com>
Link: https://lore.kernel.org/linux-riscv/60ee7c26-1a70-427d-beaf-92e2989fc479@spud/
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
Tested-by: Conor Dooley <conor.dooley@...rochip.com>
Thanks for fixing this Björn!
> ---
> arch/riscv/kernel/traps.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
> index 1f4e37be7eb3..8c258b78c925 100644
> --- a/arch/riscv/kernel/traps.c
> +++ b/arch/riscv/kernel/traps.c
> @@ -270,11 +270,11 @@ asmlinkage __visible __trap_section void do_trap_ecall_u(struct pt_regs *regs)
> if (user_mode(regs)) {
> ulong syscall = regs->a7;
>
> - syscall = syscall_enter_from_user_mode(regs, syscall);
> -
> regs->epc += 4;
> regs->orig_a0 = regs->a0;
>
> + syscall = syscall_enter_from_user_mode(regs, syscall);
> +
> if (syscall < NR_syscalls)
> syscall_handler(regs, syscall);
> else
>
> base-commit: d34a6b715a23ccd9c9d0bc7a475bea59dc3e28b2
> --
> 2.37.2
>
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