lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-ID: <d9afc07f-0346-1fe7-907c-261e4c6f92cd@linaro.org> Date: Tue, 4 Apr 2023 10:45:12 +0200 From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> To: Rick Wertenbroek <rick.wertenbroek@...il.com>, alberto.dassatti@...g-vd.ch Cc: damien.lemoal@...nsource.wdc.com, xxm@...k-chips.com, Shawn Lin <shawn.lin@...k-chips.com>, Lorenzo Pieralisi <lpieralisi@...nel.org>, Krzysztof WilczyĆski <kw@...ux.com>, Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Heiko Stuebner <heiko@...ech.de>, Johan Jonker <jbx6244@...il.com>, Brian Norris <briannorris@...omium.org>, Caleb Connolly <kc@...tmarketos.org>, Corentin Labbe <clabbe@...libre.com>, Judy Hsiao <judyhsiao@...omium.org>, Lin Huang <hl@...k-chips.com>, Arnaud Ferraris <arnaud.ferraris@...labora.com>, Hugh Cole-Baker <sigmaris@...il.com>, linux-pci@...r.kernel.org, linux-rockchip@...ts.infradead.org, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH v3 06/11] dt-bindings: PCI: Update the RK3399 example to a valid one On 04/04/2023 10:24, Rick Wertenbroek wrote: > Update the example in the documentation a valid example. > The default max-outbound-regions is 32 but the example showed 16. This is not reason to be invalid. It is perfectly fine to change default values to desired ones. What is not actually obvious is to change some value to a default one, instead of removing it... > Address for mem-base was invalid. Added pinctrl. > > Signed-off-by: Rick Wertenbroek <rick.wertenbroek@...il.com> > --- > .../devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml > index 88386a6d7011..0c67e96096eb 100644 > --- a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml > +++ b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml > @@ -47,14 +47,15 @@ examples: > > pcie-ep@...00000 { > compatible = "rockchip,rk3399-pcie-ep"; > - reg = <0x0 0xfd000000 0x0 0x1000000>, <0x0 0x80000000 0x0 0x20000>; > - reg-names = "apb-base", "mem-base"; Reg (and reg-names) is usually second property, why moving it? What is incorrect in the placement? > + rockchip,max-outbound-regions = <32>; > clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>, > <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>; > clock-names = "aclk", "aclk-perf", > "hclk", "pm"; > max-functions = /bits/ 8 <8>; > num-lanes = <4>; > + reg = <0x0 0xfd000000 0x0 0x1000000>, <0x0 0xfa000000 0x0 0x2000000>; > + reg-names = "apb-base", "mem-base"; > resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>, > <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE> , > <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, <&cru SRST_A_PCIE>; > @@ -62,7 +63,8 @@ examples: > "pm", "pclk", "aclk"; > phys = <&pcie_phy 0>, <&pcie_phy 1>, <&pcie_phy 2>, <&pcie_phy 3>; > phy-names = "pcie-phy-0", "pcie-phy-1", "pcie-phy-2", "pcie-phy-3"; > - rockchip,max-outbound-regions = <16>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie_clkreqnb_cpm>; > }; > }; > ... Best regards, Krzysztof
Powered by blists - more mailing lists