lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <39a2c174-c7f5-cb0f-5430-87b859a2ea5c@starfivetech.com>
Date:   Wed, 5 Apr 2023 09:40:27 +0800
From:   Hal Feng <hal.feng@...rfivetech.com>
To:     Shengyu Qu <wiagn233@...look.com>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>
CC:     Stephen Boyd <sboyd@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        "Rob Herring" <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor@...nel.org>,
        "Palmer Dabbelt" <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Ben Dooks <ben.dooks@...ive.com>,
        "Daniel Lezcano" <daniel.lezcano@...aro.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Emil Renner Berthing <emil.renner.berthing@...onical.com>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v7 21/22] riscv: dts: starfive: Add StarFive JH7110
 VisionFive 2 board device tree

On Wed, 5 Apr 2023 02:38:25 +0800, Shengyu Qu wrote:
> Hi Hal,
> 
>> +    aliases {
>> +        i2c0 = &i2c0;
>> +        i2c2 = &i2c2;
>> +        i2c5 = &i2c5;
>> +        i2c6 = &i2c6;
>> +        serial0 = &uart0;
>> +    };
>> +
>> +    chosen {
>> +        stdout-path = "serial0:115200n8";
>> +    };
>> +
>> +    cpus {
>> +        timebase-frequency = <4000000>;
> 
> Is mtime frequency on JH7110 could be modified?  If not, I think it's better
> 
> to put it into jh7110.dtsi.

This frequency is from (osc / 6). This is based on the frequency
of the crystal oscillator on the board. So we set it here.

Best regards,
Hal

> 
>> +    };
>> +
>> +    memory@...00000 {
>> +        device_type = "memory";
>> +        reg = <0x0 0x40000000 0x1 0x0>;
>> +    };
>> +
>> +    gpio-restart {
>> +        compatible = "gpio-restart";
>> +        gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
>> +        priority = <224>;
>> +    };
>> +};
>> +
> 
> Best regards,
> 
> Shengyu
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ