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Message-ID: <42bdb4e2-bb18-5e4d-f6fb-68564c89efee@starfivetech.com>
Date:   Thu, 6 Apr 2023 10:20:50 +0800
From:   William Qiu <william.qiu@...rfivetech.com>
To:     Conor Dooley <conor@...nel.org>
CC:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        <devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, Rob Herring <robh+dt@...nel.org>,
        "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
        Emil Renner Berthing <kernel@...il.dk>
Subject: Re: [RESEND v6 1/2] dt-bindings: soc: starfive: Add StarFive syscon
 doc



On 2023/4/6 0:38, Conor Dooley wrote:
> On Mon, Mar 20, 2023 at 03:32:14PM +0800, William Qiu wrote:
> 
>> >>> Does not look like you tested the bindings. Please run `make
>> >>> dt_binding_check` (see
>> >>> Documentation/devicetree/bindings/writing-schema.rst for instructions).
>> >>>
>> >>> ... or your PLL clock controller was not tested.
>> >>>
>> >>> Best regards,
>> >>> Krzysztof
>> >>>
>> >> Hi Krzysztof,
>> >> 
>> >> I've already done`make dt_binding_check`, and get no error. So maybe PLL clock controller
>> >> was not tested which I didn't add in this patch series. And PLL clock controller belongs
>> >> to Xingyu Wu, I would tell him.
>> > 
>> > What's confusing you do not allow here clock controller.
> 
>> I'll add it then.
> 
> What's the plan here William?
> Can you sort something out with Xingyu Wu so that the dt-binding is
> added in a complete manner?
> In the meantime, gonna drop this series as "Changes Requested" from
> patchwork.
> 
> Cheers,
> Conor.

Hi Conor,

After discussing with Xingyu, I will sort all of it and send a complete
dt-binding today.

Best regards,
William

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