lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 6 Apr 2023 19:23:40 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Niko Pasaloukos <nikolaos.pasaloukos@...ize.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Cc:     "soc@...nel.org" <soc@...nel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "olof@...om.net" <olof@...om.net>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "sboyd@...nel.org" <sboyd@...nel.org>,
        James Cowgill <james.cowgill@...ize.com>,
        Matt Redfearn <matthew.redfearn@...ize.com>,
        Neil Jones <neil.jones@...ize.com>
Subject: Re: [PATCH 3/5] dt-bindings: reset: Add binding constants for
 BLZP1600

On 06/04/2023 12:22, Niko Pasaloukos wrote:
> Add SCMI reset IDs which are used on Blaize BLZP1600 SoC.
> 
> Co-developed-by: James Cowgill <james.cowgill@...ize.com>
> Signed-off-by: James Cowgill <james.cowgill@...ize.com>
> Co-developed-by: Matt Redfearn <matt.redfearn@...ize.com>
> Signed-off-by: Matt Redfearn <matt.redfearn@...ize.com>
> Co-developed-by: Neil Jones <neil.jones@...ize.com>
> Signed-off-by: Neil Jones <neil.jones@...ize.com>
> Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@...ize.com>
> ---
>  .../dt-bindings/reset/blaize,blzp1600-reset.h | 76 +++++++++++++++++++
>  1 file changed, 76 insertions(+)
>  create mode 100644 include/dt-bindings/reset/blaize,blzp1600-reset.h
> 
> diff --git a/include/dt-bindings/reset/blaize,blzp1600-reset.h b/include/dt-bindings/reset/blaize,blzp1600-reset.h
> new file mode 100644
> index 000000000000..ff1de6b1bd5c
> --- /dev/null
> +++ b/include/dt-bindings/reset/blaize,blzp1600-reset.h
> @@ -0,0 +1,76 @@
> +/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */

Why 2.0+? Unusual choice. Do you really need it?


> +/*
> + * Copyright (C) 2022, Blaize, Inc.
> + */
> +
> +#ifndef DT_BINDING_RESET_BLZP1600_H
> +#define DT_BINDING_RESET_BLZP1600_H
> +
> +#define BLZP1600_A53_C0_HARD_RST	0
> +#define BLZP1600_A53_C0_SOFT_RST	1
> +#define BLZP1600_A53_C1_HARD_RST	2
> +#define BLZP1600_A53_C1_SOFT_RST	3
> +#define BLZP1600_A53_L2_CACHE_RST	4
> +#define BLZP1600_A53_DBG_RST		5
> +#define BLZP1600_GIC_RST		6
> +#define BLZP1600_CRYPTO_RST		7
> +#define BLZP1600_GSP_RST		9
> +#define BLZP1600_DRAM_A_SYS_RST		10
> +#define BLZP1600_DRAM_A_DDRC_RST	11
> +#define BLZP1600_DRAM_A_PRST		12
> +#define BLZP1600_DRAM_A_ARST		13
> +#define BLZP1600_DRAM_A_PHY_RST		14
> +#define BLZP1600_DRAM_A_PWRON_RST	15
> +#define BLZP1600_DRAM_A_PHY_PRST	16
> +#define BLZP1600_DRAM_B_SYS_RST		17
> +#define BLZP1600_DRAM_B_DDRC_RST	18
> +#define BLZP1600_DRAM_B_PRST		19
> +#define BLZP1600_DRAM_B_ARST		20
> +#define BLZP1600_DRAM_B_PHY_RST		21
> +#define BLZP1600_DRAM_B_PWRON_RST	22
> +#define BLZP1600_DRAM_B_PHY_PRST	23
> +#define BLZP1600_USB_RST		24
> +#define BLZP1600_USB_PHY_RST		25
> +#define BLZP1600_CAN0_RST		26
> +#define BLZP1600_CAN1_RST		27
> +#define BLZP1600_CAN2_RST		28
> +#define BLZP1600_ETH_MAC_RST		29
> +#define BLZP1600_SDIO0_RST		30
> +#define BLZP1600_SDIO1_RST		31
> +#define BLZP1600_SDIO2_RST		32
> +#define BLZP1600_SD_CARD_RST		34
> +#define BLZP1600_CSI0_CTRL_RST		35
> +#define BLZP1600_CSI0_VDMA_RST		36
> +#define BLZP1600_CSI1_CTRL_RST		37
> +#define BLZP1600_CSI1_VDMA_RST		38
> +#define BLZP1600_CSI2_CTRL_RST		39
> +#define BLZP1600_CSI2_VDMA_RST		40
> +#define BLZP1600_CSI3_CTRL_RST		41
> +#define BLZP1600_CSI3_VDMA_RST		42
> +#define BLZP1600_CSID_CTRL_RST		43
> +#define BLZP1600_CSID_VDMA_RST		44
> +#define BLZP1600_DSI_CTRL_RST		45
> +#define BLZP1600_DSI_VDMA_RST		46
> +#define BLZP1600_DMA_RST		49

You have some gaps here. These are IDs, so they do not have gaps.



Best regards,
Krzysztof

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ