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Message-ID: <CAJZ5v0gkUGhRdfOL=ciTF12EZWCMyMT7ZYams-PDtcwVSfUotA@mail.gmail.com>
Date: Thu, 6 Apr 2023 20:44:12 +0200
From: "Rafael J. Wysocki" <rafael@...nel.org>
To: Mario Limonciello <mario.limonciello@....com>
Cc: linux-kernel@...r.kernel.org, Stuart Axon <stuaxo2@...oo.com>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Len Brown <lenb@...nel.org>, linux-acpi@...r.kernel.org
Subject: Re: [PATCH] ACPI: x86: utils: Add Picasso to the list for forcing StorageD3Enable
On Fri, Mar 31, 2023 at 6:09 PM Mario Limonciello
<mario.limonciello@....com> wrote:
>
> Picasso was the first APU that introduced s2idle support from AMD,
> and it was predating before vendors started to use `StorageD3Enable`
> in their firmware.
>
> Windows doesn't have problems with this hardware and NVME so it was
> likely on the list of hardcoded CPUs to use this behavior in Windows.
>
> Add it to the list for Linux to avoid NVME resume issues.
>
> Reported-by: Stuart Axon <stuaxo2@...oo.com>
> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2449
> Signed-off-by: Mario Limonciello <mario.limonciello@....com>
> ---
> drivers/acpi/x86/utils.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c
> index da5727069d85..ba420a28a4aa 100644
> --- a/drivers/acpi/x86/utils.c
> +++ b/drivers/acpi/x86/utils.c
> @@ -213,6 +213,7 @@ bool acpi_device_override_status(struct acpi_device *adev, unsigned long long *s
> disk in the system.
> */
> static const struct x86_cpu_id storage_d3_cpu_ids[] = {
> + X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 24, NULL), /* Picasso */
> X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 96, NULL), /* Renoir */
> X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 104, NULL), /* Lucienne */
> X86_MATCH_VENDOR_FAM_MODEL(AMD, 25, 80, NULL), /* Cezanne */
> --
Applied as 6.4 material, thanks!
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