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Message-ID: <2edbb19a-aa0f-4ad7-2c83-e10f949b9d5c@linaro.org>
Date: Thu, 6 Apr 2023 21:34:44 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Nikita Travkin <nikita@...n.ru>, agross@...nel.org,
andersson@...nel.org
Cc: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
quic_srivasam@...cinc.com, judyhsiao@...omium.org,
mka@...omium.org, dianders@...omium.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, ~postmarketos/upstreaming@...ts.sr.ht
Subject: Re: [PATCH v4 4/4] arm64: dts: qcom: Add Acer Aspire 1
On 6.04.2023 17:06, Nikita Travkin wrote:
> Acer Aspire 1 is a WoA laptop based on Snapdragon 7c gen1 platform.
>
> The laptop design is similar to trogdor in the choice of primary
> components but the specifics on usage of those differ slightly.
>
> Add the devicetree for the laptop with support for most of the
> hardware present.
>
> Signed-off-by: Nikita Travkin <nikita@...n.ru>
> ---
> Changed in v2:
> - Various styling, ordering and node naming issues fixed. (Krzysztof)
>
> Changed in v3:
> - Kepp camcc on, wakeup on touchpad, minor style issues. (Konrad)
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> .../boot/dts/qcom/sc7180-acer-aspire1.dts | 859 ++++++++++++++++++
> 2 files changed, 860 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index f6ff4024a60e..f0d92c47bc7f 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -78,6 +78,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sa8295p-adp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sa8540p-ride.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sa8775p-ride.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += sc7180-acer-aspire1.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1-lte.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts b/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts
> new file mode 100644
> index 000000000000..b4161f1f21a7
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sc7180-acer-aspire1.dts
> @@ -0,0 +1,859 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +
> +#include "sc7180.dtsi"
> +
> +#include "pm6150.dtsi"
> +#include "pm6150l.dtsi"
> +
> +/delete-node/ &tz_mem;
> +/delete-node/ &ipa_fw_mem;
> +
> +/ {
> + model = "Acer Aspire 1";
> + compatible = "acer,aspire1", "qcom,sc7180";
> + chassis-type = "laptop";
> +
> + aliases {
> + bluetooth0 = &bluetooth;
> + hsuart0 = &uart3;
> + serial0 = &uart8;
> + wifi0 = &wifi;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + reserved-memory {
> + zap_mem: zap-shader@...40000 {
> + reg = <0 0x80840000 0 0x2000>;
Please use 0x0 consistently as you did below.
> + no-map;
> + };
> +
> + venus_mem: venus@...00000 {
> + reg = <0 0x85b00000 0 0x500000>;
> + no-map;
> + };
> +
> + mpss_mem: mpss@...00000 {
> + reg = <0x0 0x86000000 0x0 0x2000000>;
> + no-map;
> + };
> +
> + adsp_mem: adsp@...00000 {
> + reg = <0x0 0x8e400000 0x0 0x2800000>;
> + no-map;
> + };
> +
> + wlan_mem: wlan@...00000 {
> + reg = <0x0 0x93900000 0x0 0x200000>;
> + no-map;
> + };
> + };
> +
[...]
> + sdc1_default: sdc1-default-state {
> + clk-pins {
> + pins = "sdc1_clk";
> + bias-disable;
> + drive-strength = <16>;
drive-strength
bias-
Just like you have in all other nodes, please.
With that:
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Konrad
> + };
> +
> + cmd-pins {
> + pins = "sdc1_cmd";
> + bias-pull-up;
> + drive-strength = <16>;
> + };
> +
> + data-pins {
> + pins = "sdc1_data";
> + bias-pull-up;
> + drive-strength = <16>;
> + };
> +
> + rclk-pins {
> + pins = "sdc1_rclk";
> + bias-pull-down;
> + };
> + };
> +
> + sdc1_sleep: sdc1-sleep-state {
> + clk-pins {
> + pins = "sdc1_clk";
> + bias-disable;
> + drive-strength = <2>;
> + };
> +
> + cmd-pins {
> + pins = "sdc1_cmd";
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +
> + data-pins {
> + pins = "sdc1_data";
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +
> + rclk-pins {
> + pins = "sdc1_rclk";
> + bias-pull-down;
> + };
> + };
> +
> + ter_mi2s_active: ter-mi2s-active-state {
> + pins = "gpio63", "gpio64", "gpio65";
> + function = "mi2s_2";
> + };
> +};
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