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Message-ID: <CAJF2gTRjYra4yhWq0UYMmLYfSZ84fHJjC9JcCVpS4NQho7rvGw@mail.gmail.com>
Date: Fri, 7 Apr 2023 17:10:22 +0800
From: Guo Ren <guoren@...nel.org>
To: Huacai Chen <chenhuacai@...ngson.cn>
Cc: Huacai Chen <chenhuacai@...nel.org>, loongarch@...ts.linux.dev,
Xuefeng Li <lixuefeng@...ngson.cn>,
Xuerui Wang <kernel@...0n.name>,
Jiaxun Yang <jiaxun.yang@...goat.com>,
linux-kernel@...r.kernel.org, loongson-kernel@...ts.loongnix.cn,
stable@...r.kernel.org, Chong Qiao <qiaochong@...ngson.cn>
Subject: Re: [PATCH] LoongArch: module: set section addresses to 0x0
On Thu, Apr 6, 2023 at 10:51 AM Huacai Chen <chenhuacai@...ngson.cn> wrote:
>
> These got*, plt* and .text.ftrace_trampoline sections specified for
> LoongArch have non-zero addressses. Non-zero section addresses in a
> relocatable ELF would confuse GDB when it tries to compute the section
> offsets and it ends up printing wrong symbol addresses. Therefore, set
> them to zero, which mirrors the change in commit 5d8591bc0fbaeb6ded
> ("arm64 module: set plt* section addresses to 0x0").
Good point, maybe I would check RISC-V!
Thx.
Reviewed-by: Guo Ren <guoren@...nel.org>
>
> Cc: stable@...r.kernel.org
> Signed-off-by: Chong Qiao <qiaochong@...ngson.cn>
> Signed-off-by: Huacai Chen <chenhuacai@...ngson.cn>
> ---
> arch/loongarch/include/asm/module.lds.h | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/loongarch/include/asm/module.lds.h b/arch/loongarch/include/asm/module.lds.h
> index 438f09d4ccf4..88554f92e010 100644
> --- a/arch/loongarch/include/asm/module.lds.h
> +++ b/arch/loongarch/include/asm/module.lds.h
> @@ -2,8 +2,8 @@
> /* Copyright (C) 2020-2022 Loongson Technology Corporation Limited */
> SECTIONS {
> . = ALIGN(4);
> - .got : { BYTE(0) }
> - .plt : { BYTE(0) }
> - .plt.idx : { BYTE(0) }
> - .ftrace_trampoline : { BYTE(0) }
> + .got 0 : { BYTE(0) }
> + .plt 0 : { BYTE(0) }
> + .plt.idx 0 : { BYTE(0) }
> + .ftrace_trampoline 0 : { BYTE(0) }
> }
> --
> 2.39.1
>
--
Best Regards
Guo Ren
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