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Message-ID: <CAFGrd9pu+t1K_4B-oCoRVq_rZfWZN=XWVARpTC5dS7HydZQFKg@mail.gmail.com>
Date: Fri, 7 Apr 2023 15:14:25 +0200
From: Alexandre Mergnat <amergnat@...libre.com>
To: Wim Van Sebroeck <wim@...ux-watchdog.org>,
Guenter Roeck <linux@...ck-us.net>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Chaotian Jing <chaotian.jing@...iatek.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
Wenbin Mei <wenbin.mei@...iatek.com>,
Linus Walleij <linus.walleij@...aro.org>,
Zhiyong Tao <zhiyong.tao@...iatek.com>,
Bernhard Rosenkränzer <bero@...libre.com>,
catalin.marinas@....com, Will Deacon <will@...nel.org>
Cc: linux-watchdog@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-mmc@...r.kernel.org,
linux-gpio@...r.kernel.org,
Alexandre Bailon <abailon@...libre.com>,
Fabien Parent <fparent@...libre.com>,
Amjad Ouled-Ameur <aouledameur@...libre.com>
Subject: Re: [PATCH v5 11/12] arm64: dts: mediatek: add cpufreq support for mt8365-evk
+ To: Catalin Marinas <catalin.marinas@....com>
+ To: Will Deacon <will@...nel.org>
Sorry for the noise.
Regards,
Alexandre
Le ven. 7 avr. 2023 à 14:59, Alexandre Mergnat <amergnat@...libre.com> a écrit :
>
> In order to have cpufreq support, this patch adds proc-supply and
> sram-supply for each CPU.
>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> Signed-off-by: Alexandre Mergnat <amergnat@...libre.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
> index 431078f8670e..d723838ed49b 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
> @@ -88,6 +88,26 @@ optee_reserved: optee@...00000 {
> };
> };
>
> +&cpu0 {
> + proc-supply = <&mt6357_vproc_reg>;
> + sram-supply = <&mt6357_vsram_proc_reg>;
> +};
> +
> +&cpu1 {
> + proc-supply = <&mt6357_vproc_reg>;
> + sram-supply = <&mt6357_vsram_proc_reg>;
> +};
> +
> +&cpu2 {
> + proc-supply = <&mt6357_vproc_reg>;
> + sram-supply = <&mt6357_vsram_proc_reg>;
> +};
> +
> +&cpu3 {
> + proc-supply = <&mt6357_vproc_reg>;
> + sram-supply = <&mt6357_vsram_proc_reg>;
> +};
> +
> ðernet {
> pinctrl-0 = <ðernet_pins>;
> pinctrl-names = "default";
>
> --
> 2.25.1
>
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