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Date:   Mon, 10 Apr 2023 12:15:48 -0300
From:   Arnaldo Carvalho de Melo <acme@...nel.org>
To:     Ravi Bangoria <ravi.bangoria@....com>
Cc:     Namhyung Kim <namhyung@...nel.org>, peterz@...radead.org,
        mingo@...nel.org, eranian@...gle.com, kan.liang@...ux.intel.com,
        jolsa@...nel.org, irogers@...gle.com, adrian.hunter@...el.com,
        leo.yan@...aro.org, kjain@...ux.ibm.com,
        linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
        sandipan.das@....com, ananth.narayan@....com,
        santosh.shukla@....com
Subject: Re: [PATCH v3 0/9] perf/mem: AMD IBS and generic tools improvements

Em Mon, Apr 10, 2023 at 07:53:57AM +0530, Ravi Bangoria escreveu:
> On 08-Apr-23 3:14 AM, Namhyung Kim wrote:
> > Hi Ravi,
> > 
> > On Fri, Apr 7, 2023 at 4:25 AM Ravi Bangoria <ravi.bangoria@....com> wrote:
> >>
> >> Kernel IBS driver wasn't using new PERF_MEM_* APIs due to some of its
> >> limitations. Mainly:
> >>
> >> 1. mem_lvl_num doesn't allow setting multiple sources whereas old API
> >>    allows it. Setting multiple data sources is useful because IBS on
> >>    pre-zen4 uarch doesn't provide fine granular DataSrc details (there
> >>    is only one such DataSrc(2h) though).
> >> 2. perf mem sorting logic (sort__lvl_cmp()) ignores mem_lvl_num. perf
> >>    c2c (c2c_decode_stats()) does not use mem_lvl_num at all. perf mem
> >>    prints mem_lvl and mem_lvl_num both if both are set, which is ugly.
> >>
> >> Set mem_lvl_num, mem_remote and mem_hops for data_src via IBS. Handle
> >> first issue using mem_lvl_num = ANY_CACHE | HOPS_0. In addition to
> >> setting new API fields, convert all individual field assignments to
> >> compile time wrapper macros built using PERF_MEM_S(). Also convert
> >> DataSrc conditional code to array lookups.
> >>
> >> Interpretation of perf_mem_data_src by perf_mem__lvl_scnprintf() was
> >> non-intuitive. Make it sane.
> > 
> > Looks good, but I think you need to split kernel and user patches.
> 
> Patch #1 to #3 are kernel changes. Patch #4 to #9 are userspace changes.
> Arnaldo, Peter, please let me know if you wants to split the series and
> resend.

I can always use b4's -P option :-) So no need to resubmit, I can pick
the tools bits,

- Arnaldo
 
> > 
> >>
> >> v2: https://lore.kernel.org/r/20230327130851.1565-1-ravi.bangoria%40amd.com
> >> v2->v3:
> >>   - IBS: Don't club RmtNode with DataSrc=7 (IO)
> >>   - Make perf_mem__lvl_scnprintf() more sane
> >>   - Introduce PERF_MEM_LVLNUM_UNC, set it along with PERF_MEM_LVL_UNC
> >>     and interpreat it in tool.
> >>   - Add PERF_MEM_LVLNUM_NA to default data_src value
> >>   - Change some of the IBS bit description according to latest PPR
> >>
> >> Namhyung Kim (1):
> >>   perf/x86/ibs: Set mem_lvl_num, mem_remote and mem_hops for data_src
> >>
> >> Ravi Bangoria (8):
> >>   perf/mem: Introduce PERF_MEM_LVLNUM_UNC
> >>   perf/mem: Add PERF_MEM_LVLNUM_NA to PERF_MEM_NA
> >>   perf headers: Sync uapi/linux/perf_event.h
> >>   perf mem: Add PERF_MEM_LVLNUM_NA to PERF_MEM_DATA_SRC_NONE
> >>   perf mem: Add support for printing PERF_MEM_LVLNUM_UNC
> >>   perf mem: Refactor perf_mem__lvl_scnprintf()
> >>   perf mem: Increase HISTC_MEM_LVL column size to 39 chars
> >>   perf script ibs: Change bit description according to latest PPR
> > 
> > Acked-by: Namhyung Kim <namhyung@...nel.org>
> 
> Thanks!

-- 

- Arnaldo

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