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Message-ID: <d1d39179-33a0-d35b-7593-e0a02aa3b10a@amd.com>
Date: Mon, 10 Apr 2023 00:03:31 -0500
From: Mario Limonciello <mario.limonciello@....com>
To: Kornel Dulęba <korneld@...omium.org>,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
regressions@...mhuis.info
Cc: Basavaraj Natikar <Basavaraj.Natikar@....com>,
Shyam Sundar S K <Shyam-sundar.S-k@....com>,
Linus Walleij <linus.walleij@...aro.org>,
upstream@...ihalf.com, rad@...ihalf.com, mattedavis@...gle.com
Subject: Re: [PATCH] pinctrl: amd: Disable and mask interrupts on resume
On 3/20/23 04:32, Kornel Dulęba wrote:
> This fixes a similar problem to the one observed in:
> commit 4e5a04be88fe ("pinctrl: amd: disable and mask interrupts on probe").
>
> On some systems, during suspend/resume cycle firmware leaves
> an interrupt enabled on a pin that is not used by the kernel.
> This confuses the AMD pinctrl driver and causes spurious interrupts.
>
> The driver already has logic to detect if a pin is used by the kernel.
> Leverage it to re-initialize interrupt fields of a pin only if it's not
> used by us.
>
> Signed-off-by: Kornel Dulęba <korneld@...omium.org>
> ---
> drivers/pinctrl/pinctrl-amd.c | 36 +++++++++++++++++++----------------
> 1 file changed, 20 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
> index 9236a132c7ba..609821b756c2 100644
> --- a/drivers/pinctrl/pinctrl-amd.c
> +++ b/drivers/pinctrl/pinctrl-amd.c
> @@ -872,32 +872,34 @@ static const struct pinconf_ops amd_pinconf_ops = {
> .pin_config_group_set = amd_pinconf_group_set,
> };
>
> -static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)
> +static void amd_gpio_irq_init_pin(struct amd_gpio *gpio_dev, int pin)
> {
> - struct pinctrl_desc *desc = gpio_dev->pctrl->desc;
> + const struct pin_desc *pd;
> unsigned long flags;
> u32 pin_reg, mask;
> - int i;
>
> mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3) |
> BIT(INTERRUPT_MASK_OFF) | BIT(INTERRUPT_ENABLE_OFF) |
> BIT(WAKE_CNTRL_OFF_S4);
>
> - for (i = 0; i < desc->npins; i++) {
> - int pin = desc->pins[i].number;
> - const struct pin_desc *pd = pin_desc_get(gpio_dev->pctrl, pin);
> -
> - if (!pd)
> - continue;
> + pd = pin_desc_get(gpio_dev->pctrl, pin);
> + if (!pd)
> + return;
>
> - raw_spin_lock_irqsave(&gpio_dev->lock, flags);
> + raw_spin_lock_irqsave(&gpio_dev->lock, flags);
> + pin_reg = readl(gpio_dev->base + pin * 4);
> + pin_reg &= ~mask;
> + writel(pin_reg, gpio_dev->base + pin * 4);
> + raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
> +}
>
> - pin_reg = readl(gpio_dev->base + i * 4);
> - pin_reg &= ~mask;
> - writel(pin_reg, gpio_dev->base + i * 4);
> +static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)
> +{
> + struct pinctrl_desc *desc = gpio_dev->pctrl->desc;
> + int i;
>
> - raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
> - }
> + for (i = 0; i < desc->npins; i++)
> + amd_gpio_irq_init_pin(gpio_dev, i);
> }
>
> #ifdef CONFIG_PM_SLEEP
> @@ -950,8 +952,10 @@ static int amd_gpio_resume(struct device *dev)
> for (i = 0; i < desc->npins; i++) {
> int pin = desc->pins[i].number;
>
> - if (!amd_gpio_should_save(gpio_dev, pin))
> + if (!amd_gpio_should_save(gpio_dev, pin)) {
> + amd_gpio_irq_init_pin(gpio_dev, pin);
> continue;
> + }
>
> raw_spin_lock_irqsave(&gpio_dev->lock, flags);
> gpio_dev->saved_regs[i] |= readl(gpio_dev->base + pin * 4) & PIN_IRQ_PENDING;
Hello Kornel,
I've found that this commit which was included in 6.3-rc5 is causing a
regression waking up from lid on a Lenovo Z13.
Reverting it on top of 6.3-rc6 resolves the problem.
I've collected what I can into this bug report:
https://bugzilla.kernel.org/show_bug.cgi?id=217315
Linus Walleij,
It looks like this was CC to stable. If we can't get a quick solution
we might want to pull this from stable.
Thanks,
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