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Message-ID: <20230411064743.273388-8-changhuang.liang@starfivetech.com>
Date:   Mon, 10 Apr 2023 23:47:43 -0700
From:   Changhuang Liang <changhuang.liang@...rfivetech.com>
To:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Emil Renner Berthing <kernel@...il.dk>,
        Conor Dooley <conor@...nel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>
CC:     Walker Chen <walker.chen@...rfivetech.com>,
        Changhuang Liang <changhuang.liang@...rfivetech.com>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-riscv@...ts.infradead.org>
Subject: [PATCH v1 7/7] riscv: dts: starfive: Add dphy rx pmu node

Add dphy rx pmu node to configure dphy power.

Signed-off-by: Changhuang Liang <changhuang.liang@...rfivetech.com>
Reviewed-by: Walker Chen <walker.chen@...rfivetech.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index f271c3184d3a..a82374afcc91 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -499,6 +499,11 @@ aoncrg: clock-controller@...00000 {
 		aon_syscon: syscon@...10000 {
 			compatible = "starfive,jh7110-aon-syscon", "syscon", "simple-mfd";
 			reg = <0x0 0x17010000 0x0 0x1000>;
+
+			pwrc_dphy: power-controller {
+				compatible = "starfive,jh7110-pmu-dphy";
+				#power-domain-cells = <1>;
+			};
 		};
 
 		aongpio: pinctrl@...20000 {
-- 
2.25.1

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