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Message-ID: <20230411083257.16155-2-mason.huo@starfivetech.com>
Date: Tue, 11 Apr 2023 16:32:55 +0800
From: Mason Huo <mason.huo@...rfivetech.com>
To: "Rafael J. Wysocki" <rafael@...nel.org>,
Viresh Kumar <viresh.kumar@...aro.org>,
Emil Renner Berthing <kernel@...il.dk>,
"Rob Herring" <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor@...nel.org>,
"Paul Walmsley" <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>
CC: Shengyu Qu <wiagn233@...look.com>, <linux-pm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-riscv@...ts.infradead.org>,
Mason Huo <mason.huo@...rfivetech.com>
Subject: [PATCH v1 1/3] riscv: dts: starfive: Enable axp15060 pmic for cpufreq
The VisionFive 2 board has an embedded pmic axp15060,
which supports the cpu DVFS through the dcdc2 regulator.
This patch enables axp15060 pmic and configs the dcdc2.
Signed-off-by: Mason Huo <mason.huo@...rfivetech.com>
---
.../starfive/jh7110-starfive-visionfive-2.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 2a6d81609284..df582bddae4b 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -114,6 +114,21 @@ &i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&i2c5_pins>;
status = "okay";
+
+ pmic: axp15060_reg@36 {
+ compatible = "x-powers,axp15060";
+ reg = <0x36>;
+
+ regulators {
+ reg_dcdc2: dcdc2 {
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1540000>;
+ regulator-name = "vdd-cpu";
+ };
+ };
+ };
};
&i2c6 {
--
2.39.2
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