[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <6037f0e2-9c9d-b3d8-2641-bb362a2cec2e@linux.intel.com>
Date: Tue, 11 Apr 2023 14:45:12 +0300 (EEST)
From: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
To: Xu Yilun <yilun.xu@...el.com>
cc: Wu Hao <hao.wu@...el.com>, Tom Rix <trix@...hat.com>,
Moritz Fischer <mdf@...nel.org>, linux-fpga@...r.kernel.org,
Lee Jones <lee@...nel.org>, Jean Delvare <jdelvare@...e.com>,
Guenter Roeck <linux@...ck-us.net>,
linux-hwmon@...r.kernel.org,
Russ Weight <russell.h.weight@...el.com>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 4/4] mfd: intel-m10-bmc: Manage access to MAX 10 fw
handshake registers
On Fri, 7 Apr 2023, Xu Yilun wrote:
> On 2023-04-05 at 11:01:52 +0300, Ilpo Järvinen wrote:
> > On some MAX 10 cards, the BMC firmware is not available to service
> > handshake registers during secure update erase and write phases at
> > normal speeds. This problem affects at least hwmon driver. When the MAX
> > 10 hwmon driver tries to read the sensor values during a secure update,
> > the reads are slowed down (e.g., reading all D5005 sensors takes ~24s
> > which is magnitudes worse than the normal <0.02s).
> >
> > Manage access to the handshake registers using a rw semaphore and a FW
> > state variable to prevent accesses during those secure update phases
> > and return -EBUSY instead.
> >
> > Co-developed-by: Russ Weight <russell.h.weight@...el.com>
> > Signed-off-by: Russ Weight <russell.h.weight@...el.com>
> > Co-developed-by: Xu Yilun <yilun.xu@...el.com>
> > Signed-off-by: Xu Yilun <yilun.xu@...el.com>
> > Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
> > ---
> > drivers/fpga/intel-m10-bmc-sec-update.c | 17 +++++--
> > drivers/mfd/intel-m10-bmc-core.c | 63 ++++++++++++++++++++++++-
> > drivers/mfd/intel-m10-bmc-pmci.c | 4 ++
> > drivers/mfd/intel-m10-bmc-spi.c | 14 ++++++
> > include/linux/mfd/intel-m10-bmc.h | 27 +++++++++++
> > 5 files changed, 120 insertions(+), 5 deletions(-)
> >
>
> [...]
>
> >
> > +static const struct regmap_range null_fw_handshake_regs[0];
> > +
> > static const struct m10bmc_csr_map m10bmc_n6000_csr_map = {
> > .base = M10BMC_N6000_SYS_BASE,
> > .build_version = M10BMC_N6000_BUILD_VER,
> > @@ -375,6 +377,8 @@ static const struct m10bmc_csr_map m10bmc_n6000_csr_map = {
> > static const struct intel_m10bmc_platform_info m10bmc_pmci_n6000 = {
> > .cells = m10bmc_pmci_n6000_bmc_subdevs,
> > .n_cells = ARRAY_SIZE(m10bmc_pmci_n6000_bmc_subdevs),
> > + .handshake_sys_reg_ranges = null_fw_handshake_regs,
> > + .handshake_sys_reg_nranges = 0,
>
> Not sure why a zero length array is needed? Could we just remove
> these 2 lines?
It seems to be safe to remove them so I dropped it.
--
i.
Powered by blists - more mailing lists