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Message-ID: <9e1e536c-9ca9-f9ce-8c1e-946c91214e37@amd.com>
Date: Tue, 11 Apr 2023 08:51:45 -0500
From: "Limonciello, Mario" <mario.limonciello@....com>
To: Kornel Dulęba <korneld@...omium.org>,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Basavaraj Natikar <Basavaraj.Natikar@....com>,
Shyam Sundar S K <Shyam-sundar.S-k@....com>,
Linus Walleij <linus.walleij@...aro.org>,
upstream@...ihalf.com, rad@...ihalf.com, mattedavis@...gle.com,
Gong Richard <richard.gong@....com>
Subject: Re: [PATCH] Revert "pinctrl: amd: Disable and mask interrupts on
resume"
On 4/11/2023 08:49, Kornel Dulęba wrote:
> This reverts commit b26cd9325be4c1fcd331b77f10acb627c560d4d7.
>
> This patch introduces a regression on Lenovo Z13, which can't wake
> from the lid with it applied; and some unspecified AMD based Dell
> platforms are unable to wake from hitting the power button
>
> Signed-off-by: Kornel Dulęba <korneld@...omium.org>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=217315
Reviewed-by: Mario Limonciello <mario.limonciello@....com>
Cc: stable@...r.kernel.org
> ---
> drivers/pinctrl/pinctrl-amd.c | 36 ++++++++++++++++-------------------
> 1 file changed, 16 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
> index 609821b756c2..9236a132c7ba 100644
> --- a/drivers/pinctrl/pinctrl-amd.c
> +++ b/drivers/pinctrl/pinctrl-amd.c
> @@ -872,34 +872,32 @@ static const struct pinconf_ops amd_pinconf_ops = {
> .pin_config_group_set = amd_pinconf_group_set,
> };
>
> -static void amd_gpio_irq_init_pin(struct amd_gpio *gpio_dev, int pin)
> +static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)
> {
> - const struct pin_desc *pd;
> + struct pinctrl_desc *desc = gpio_dev->pctrl->desc;
> unsigned long flags;
> u32 pin_reg, mask;
> + int i;
>
> mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3) |
> BIT(INTERRUPT_MASK_OFF) | BIT(INTERRUPT_ENABLE_OFF) |
> BIT(WAKE_CNTRL_OFF_S4);
>
> - pd = pin_desc_get(gpio_dev->pctrl, pin);
> - if (!pd)
> - return;
> + for (i = 0; i < desc->npins; i++) {
> + int pin = desc->pins[i].number;
> + const struct pin_desc *pd = pin_desc_get(gpio_dev->pctrl, pin);
>
> - raw_spin_lock_irqsave(&gpio_dev->lock, flags);
> - pin_reg = readl(gpio_dev->base + pin * 4);
> - pin_reg &= ~mask;
> - writel(pin_reg, gpio_dev->base + pin * 4);
> - raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
> -}
> + if (!pd)
> + continue;
>
> -static void amd_gpio_irq_init(struct amd_gpio *gpio_dev)
> -{
> - struct pinctrl_desc *desc = gpio_dev->pctrl->desc;
> - int i;
> + raw_spin_lock_irqsave(&gpio_dev->lock, flags);
>
> - for (i = 0; i < desc->npins; i++)
> - amd_gpio_irq_init_pin(gpio_dev, i);
> + pin_reg = readl(gpio_dev->base + i * 4);
> + pin_reg &= ~mask;
> + writel(pin_reg, gpio_dev->base + i * 4);
> +
> + raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
> + }
> }
>
> #ifdef CONFIG_PM_SLEEP
> @@ -952,10 +950,8 @@ static int amd_gpio_resume(struct device *dev)
> for (i = 0; i < desc->npins; i++) {
> int pin = desc->pins[i].number;
>
> - if (!amd_gpio_should_save(gpio_dev, pin)) {
> - amd_gpio_irq_init_pin(gpio_dev, pin);
> + if (!amd_gpio_should_save(gpio_dev, pin))
> continue;
> - }
>
> raw_spin_lock_irqsave(&gpio_dev->lock, flags);
> gpio_dev->saved_regs[i] |= readl(gpio_dev->base + pin * 4) & PIN_IRQ_PENDING;
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