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Message-ID: <ZDbeb/9+xWGzfAZ3@matsya>
Date: Wed, 12 Apr 2023 22:08:07 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Siddharth Vadapalli <s-vadapalli@...com>
Cc: kishon@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski@...aro.org, krzysztof.kozlowski+dt@...aro.org,
linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
srk@...com
Subject: Re: [PATCH] dt-bindings: phy: ti: phy-gmii-sel: Add support for
J784S4 CPSW9G
On 15-03-23, 14:54, Siddharth Vadapalli wrote:
> The CPSW9G instance of CPSW Ethernet Switch on TI's J784S4 SoC supports
> additional PHY modes like QSGMII. Add a compatible for it.
>
> Enable the use of "ti,qsgmii-main-ports" property for J784S4 CPSW9G.
Applied, thanks
--
~Vinod
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