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Message-ID: <ZDbjiMq3fWtUhci9@matsya>
Date: Wed, 12 Apr 2023 22:29:52 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Cai Huoqing <cai.huoqing@...ux.dev>
Cc: fancer.lancer@...il.com,
Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
Jingoo Han <jingoohan1@...il.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
linux-kernel@...r.kernel.org, dmaengine@...r.kernel.org,
linux-pci@...r.kernel.org
Subject: Re: [PATCH v9 0/4] dmaengine: dw-edma: Add support for native HDMA
On 24-03-23, 10:14, Cai Huoqing wrote:
> Add support for HDMA NATIVE, as long the IP design has set
> the compatible register map parameter-HDMA_NATIVE,
> which allows compatibility for native HDMA register configuration.
>
> The HDMA Hyper-DMA IP is an enhancement of the eDMA embedded-DMA IP.
> And the native HDMA registers are different from eDMA,
> so this patch add support for HDMA NATIVE mode.
>
> HDMA write and read channels operate independently to maximize
> the performance of the HDMA read and write data transfer over
> the link When you configure the HDMA with multiple read channels,
> then it uses a round robin (RR) arbitration scheme to select
> the next read channel to be serviced.The same applies when
> youhave multiple write channels.
>
> The native HDMA driver also supports a maximum of 16 independent
> channels (8 write + 8 read), which can run simultaneously.
> Both SAR (Source Address Register) and DAR (Destination Address Register)
> are aligned to byte.
It fails to apply, pls rebase and resend
--
~Vinod
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