linux-kernel - Re: [PATCH v3 1/2] drm/mediatek: Add mdp

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Date:   Thu, 13 Apr 2023 07:37:03 +0800
From:   Chun-Kuang Hu <chunkuang.hu@...nel.org>
To:     "Nancy.Lin" <nancy.lin@...iatek.com>,
        Chun-Kuang Hu <chunkuang.hu@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Matthias Brugger <matthias.bgg@...il.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        David Airlie <airlied@...il.com>,
        dri-devel@...ts.freedesktop.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com,
        singo.chang@...iatek.com, shawn.sung@...iatek.com
Cc:     Daniel Vetter <daniel@...ll.ch>
Subject: Re: [PATCH v3 1/2] drm/mediatek: Add mdp_rdma get format function

Hi, Daniel:

Daniel Vetter <daniel@...ll.ch> 於 2023年4月11日 週二 下午6:32寫道：
>
> On Thu, Mar 30, 2023 at 11:26:13AM +0800, Nancy.Lin wrote:
> > Add mdp_rdma get_format and get_num_formats function.
> >
> > Signed-off-by: Nancy.Lin <nancy.lin@...iatek.com>
>
> The mtk get_formats stuff seems like a lot of midlayering for not much
> reasons? Is that really needed?

In general, mediatek crtc directly control dma device such as OVL
(multiple plane), RDMA (single plane) and supported format information
store in these sub driver. MT8195 hardware use 4 RDMA to work like
OVL. To simplify the crtc control of dma device, we use a midlayer
OVL_Adaptor to control the 4 RDMA, so crtc just control one
OVL_Adaptor. crtc should query supported format from OVL_Adaptor, but
the supported format store in RDMA driver. That's why we have two
layer get_formats.

Regards,
Chun-Kuang.

>
> Just a drive-by questions I had while merging the pr.
> -Daniel
>
> > ---
> >  drivers/gpu/drm/mediatek/mtk_disp_drv.h |  3 +++
> >  drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 24 ++++++++++++++++++++++++
> >  2 files changed, 27 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > index 0d28b2e2069c..17b169530beb 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> > @@ -152,4 +152,7 @@ void mtk_mdp_rdma_start(struct device *dev, struct cmdq_pkt *cmdq_pkt);
> >  void mtk_mdp_rdma_stop(struct device *dev, struct cmdq_pkt *cmdq_pkt);
> >  void mtk_mdp_rdma_config(struct device *dev, struct mtk_mdp_rdma_cfg *cfg,
> >                        struct cmdq_pkt *cmdq_pkt);
> > +const u32 *mtk_mdp_rdma_get_formats(struct device *dev);
> > +size_t mtk_mdp_rdma_get_num_formats(struct device *dev);
> > +
> >  #endif
> > diff --git a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c b/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c
> > index eecfa98ff52e..e06db6e56b5f 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_mdp_rdma.c
> > @@ -62,6 +62,20 @@
> >  #define RDMA_CSC_FULL709_TO_RGB                      5
> >  #define RDMA_CSC_BT601_TO_RGB                        6
> >
> > +static const u32 formats[] = {
> > +     DRM_FORMAT_XRGB8888,
> > +     DRM_FORMAT_ARGB8888,
> > +     DRM_FORMAT_BGRX8888,
> > +     DRM_FORMAT_BGRA8888,
> > +     DRM_FORMAT_ABGR8888,
> > +     DRM_FORMAT_XBGR8888,
> > +     DRM_FORMAT_RGB888,
> > +     DRM_FORMAT_BGR888,
> > +     DRM_FORMAT_RGB565,
> > +     DRM_FORMAT_UYVY,
> > +     DRM_FORMAT_YUYV,
> > +};
> > +
> >  enum rdma_format {
> >       RDMA_INPUT_FORMAT_RGB565 = 0,
> >       RDMA_INPUT_FORMAT_RGB888 = 1,
> > @@ -219,6 +233,16 @@ void mtk_mdp_rdma_config(struct device *dev, struct mtk_mdp_rdma_cfg *cfg,
> >                          MDP_RDMA_MF_CLIP_SIZE, FLD_MF_CLIP_H);
> >  }
> >
> > +const u32 *mtk_mdp_rdma_get_formats(struct device *dev)
> > +{
> > +     return formats;
> > +}
> > +
> > +size_t mtk_mdp_rdma_get_num_formats(struct device *dev)
> > +{
> > +     return ARRAY_SIZE(formats);
> > +}
> > +
> >  int mtk_mdp_rdma_clk_enable(struct device *dev)
> >  {
> >       struct mtk_mdp_rdma *rdma = dev_get_drvdata(dev);
> > --
> > 2.18.0
> >
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch