linux-kernel - Re: [PATCH v2 2/3] cacheinfo: Check cache properties are present in DT

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Date:   Wed, 12 Apr 2023 10:12:29 +0200
From:   Pierre Gondois <pierre.gondois@....com>
To:     Conor Dooley <conor.dooley@...rochip.com>
Cc:     linux-kernel@...r.kernel.org, Radu Rendec <rrendec@...hat.com>,
        Alexandre Ghiti <alexghiti@...osinc.com>,
        Will Deacon <will@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        "Rafael J. Wysocki" <rafael@...nel.org>,
        Sudeep Holla <sudeep.holla@....com>,
        Palmer Dabbelt <palmer@...osinc.com>,
        Gavin Shan <gshan@...hat.com>
Subject: Re: [PATCH v2 2/3] cacheinfo: Check cache properties are present in
 DT

Hello Conor,

On 4/12/23 09:55, Conor Dooley wrote:
> Hey Pierre!
> 
> On Wed, Apr 12, 2023 at 09:18:05AM +0200, Pierre Gondois wrote:
>> If a Device Tree (DT) is used, the presence of cache properties is
>> assumed. Not finding any is not considered. For arm64 platforms,
>> cache information can be fetched from the clidr_el1 register.
>> Checking whether cache information is available in the DT
>> allows to switch to using clidr_el1.
>>
>> init_of_cache_level()
>> \-of_count_cache_leaves()
>> will assume there a 2 cache leaves (L1 data/instruction caches), which
>> can be different from clidr_el1 information.
>>
>> cache_setup_of_node() tries to read cache properties in the DT.
>> If there are none, this is considered a success. Knowing no
>> information was available would allow to switch to using clidr_el1.
> 
> Hmm, w/ this series I am still seeing a:
> [    0.306736] Early cacheinfo failed, ret = -22
> 
> Not finding any cacheinfo is totally valid, right?
> 
> A basic RISC-V QEMU setup is sufficient to reproduce, for instance:
> | $(qemu) \
> | 	-m 2G -smp 5 \
> | 	-M virt -nographic \
> | 	-kernel $(vmlinux_bin)

Sorry I forgot to remove the:
   pr_err("Early cacheinfo failed, ret = %d\n", ret);

I ll wait until tomorrow to send a v3 with this fixed.

Thanks for testing,
Regards,
Pierre

> 
> Cheers,
> Conor.
>