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Message-Id: <20230412112739.160376-17-angelogioacchino.delregno@collabora.com>
Date:   Wed, 12 Apr 2023 13:27:28 +0200
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     matthias.bgg@...il.com
Cc:     p.zabel@...gutronix.de, airlied@...il.com, daniel@...ll.ch,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        jassisinghbrar@...il.com, chunfeng.yun@...iatek.com,
        vkoul@...nel.org, kishon@...nel.org, thierry.reding@...il.com,
        u.kleine-koenig@...gutronix.de, chunkuang.hu@...nel.org,
        angelogioacchino.delregno@...labora.com, ck.hu@...iatek.com,
        jitao.shi@...iatek.com, xinlei.lee@...iatek.com,
        houlong.wei@...iatek.com, dri-devel@...ts.freedesktop.org,
        linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-phy@...ts.infradead.org, linux-pwm@...r.kernel.org,
        kernel@...labora.com, phone-devel@...r.kernel.org,
        ~postmarketos/upstreaming@...ts.sr.ht
Subject: [PATCH 16/27] arm64: dts: mediatek: mt6795: Add support for the CMDQ/GCE mailbox

In preparation for adding multimedia blocks, add the CMDQ/GCE mailbox.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
---
 arch/arm64/boot/dts/mediatek/mt6795.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
index 090400d7fd61..99cc4918e6ba 100644
--- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi
@@ -7,6 +7,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
+#include <dt-bindings/gce/mediatek,mt6795-gce.h>
 #include <dt-bindings/pinctrl/mt6795-pinfunc.h>
 #include <dt-bindings/power/mt6795-power.h>
 #include <dt-bindings/reset/mediatek,mt6795-resets.h>
@@ -401,6 +402,15 @@ fhctl: clock-controller@...09f00 {
 			status = "disabled";
 		};
 
+		gce: mailbox@...12000 {
+			compatible = "mediatek,mt6795-gce", "mediatek,mt8173-gce";
+			reg = <0 0x10212000 0 0x1000>;
+			interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
+			clocks = <&infracfg CLK_INFRA_GCE>;
+			clock-names = "gce";
+			#mbox-cells = <2>;
+		};
+
 		gic: interrupt-controller@...21000 {
 			compatible = "arm,gic-400";
 			#interrupt-cells = <3>;
-- 
2.40.0

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