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Message-ID: <71167f33-1e54-53ed-0101-c7293149d89b@arm.com>
Date: Wed, 12 Apr 2023 13:41:27 +0100
From: Robin Murphy <robin.murphy@....com>
To: Jonathan Cameron <Jonathan.Cameron@...wei.com>,
Peter Zijlstra <peterz@...radead.org>
Cc: Yicong Yang <yangyicong@...wei.com>,
Mark Rutland <mark.rutland@....com>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Will Deacon <will@...nel.org>, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, gregkh@...uxfoundation.org,
yangyicong@...ilicon.com, linuxarm@...wei.com,
Dan Williams <dan.j.williams@...el.com>,
Shaokun Zhang <zhangshaokun@...ilicon.com>,
Jiucheng Xu <jiucheng.xu@...ogic.com>,
Khuong Dinh <khuong@...amperecomputing.com>,
Robert Richter <rric@...nel.org>,
Atish Patra <atishp@...shpatra.org>,
Anup Patel <anup@...infault.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Frank Li <Frank.li@....com>,
Shuai Xue <xueshuai@...ux.alibaba.com>,
Vineet Gupta <vgupta@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Fenghua Yu <fenghua.yu@...el.com>,
Dave Jiang <dave.jiang@...el.com>, Wu Hao <hao.wu@...el.com>,
Tom Rix <trix@...hat.com>, linux-fpga@...r.kernel.org,
Suzuki K Poulose <suzuki.poulose@....com>,
Liang Kan <kan.liang@...ux.intel.com>
Subject: Re: [PATCH 01/32] perf: Allow a PMU to have a parent
On 2023-04-06 17:44, Jonathan Cameron wrote:
> On Thu, 6 Apr 2023 14:40:40 +0200
> Peter Zijlstra <peterz@...radead.org> wrote:
>
>> On Thu, Apr 06, 2023 at 11:16:07AM +0100, Jonathan Cameron wrote:
>>
>>> In the long run I agree it would be good. Short term there are more instances of
>>> struct pmu that don't have parents than those that do (even after this series).
>>> We need to figure out what to do about those before adding checks on it being
>>> set.
>>
>> Right, I don't think you've touched *any* of the x86 PMUs for example,
>> and getting everybody that boots an x86 kernel a warning isn't going to
>> go over well :-)
>>
>
> It was tempting :) "Warning: Parentless PMU: try a different architecture."
>
> I'd love some inputs on what the x86 PMU devices parents should be?
> CPU counters in general tend to just spin out of deep in the architecture code.
>
> My overall favorite is an l2 cache related PMU that is spun up in
> arch/arm/kernel/irq.c init_IRQ()
>
> I'm just not going to try and figure out why...
I think that's simply because the PMU support was hung off the existing
PL310 configuration code, which still supports non-DT boardfiles. The
PMU shouldn't strictly need to be registered that early, it would just
be a bunch more work to ensure that a platform device is available for
it to bind to as a regular driver model driver, which wasn't justifiable
at the time.
Thanks,
Robin.
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